摘要
在集成电路的制造阶段延续摩尔定律变得越发困难,而在封装阶段利用三维空间可以视作对摩尔定律的拓展。硅通孔是利用三维空间实现先进封装的常用技术手段,现有技术中对于应用于CMOS图像传感器件封装的圆台硅通孔,采用的是在顶部不断横向刻蚀的方式实现的,不利于封装密度的提高,且对于光刻设备的分辨率有一定的要求。针对现有技术中的问题,一种严格控制横向刻蚀尺寸(仅占原始特征尺寸的3%~12%)的圆台硅通孔刻蚀方法被研究探索出来。该方法通过调节下电极功率(≤30 W),获得了侧壁角度可调(70°~88°)、通孔底部开口尺寸小于光刻定义特征尺寸的圆台硅通孔结构。这一方法有望向三维集成电路领域推广,有助于在封装阶段延续摩尔定律。
It becomes more and more difficult to maintainMoore's lawin the manufacturing stage of integrated circuits,and the use of three-dimensional space in the packaging stage can be regarded as an extension of Moore's law.Silicon via is a common technology to realize advanced packaging by using three-dimensional space.In the existing technology,the circular truncated cone through silicon via applied to the packaging of CMOS image sensor devices is realized by continuous transverse etching on the top,which is hard to improve the packaging density and has certain requirements for the resolution of lithography equipment.Aiming at the problems in the existing technology,a circular truncated cone through silicon via hole with strict controlled transverse etching(undercut size is 3%-12%of the critical dimension)has been studied and explored.By adjusting the power of the lower electrode(no move than 30 W),this method can obtain a circular truncated cone through silicon via hole with adjustable side wall angle(70°-88°)and the size of the through-hole bottom opening smaller than the defined characteristic size of lithography.This method is expected to be extended to three-dimensional integrated circuits,which will help to maintainMoore's lawin the packaging stage.
作者
林源为
赵晋荣
曹泽京
袁仁志
LIN Yuanwei;ZHAO Jinrong;CAO Zejing;YUAN Renzhi(Department of Semiconductor Etching,NAURA Technology Group Co.,Ltd.,Beijing 100176,China)
出处
《电子与封装》
2023年第3期114-119,共6页
Electronics & Packaging
关键词
先进封装
圆台硅通孔
等离子刻蚀法
advanced packaging
circular truncated cone through silicon via
plasma etch method
