摘要
阐述在PULPino SoC平台上进行超低功耗芯片的设计,采用电源门控、时钟门控、功耗管理模块的低功耗设计技术,在各个设计层次上进行功耗优化,从而实现超低功耗的SoC芯片。
This paper describes the design of ultra-low power chip on the PULPINO So C platform. The low-power design technology of power-gated, clock-gated and power management module is used to optimize the power consumption at each design level, so as to achieve ultra-low power So C chip.
作者
谢辉
XIE Hui(Shenzhen University,Guangdong 518060,China)
出处
《集成电路应用》
2023年第1期1-3,共3页
Application of IC
关键词
电路设计
物联网
SOC
超低功耗
电源门控
时钟门控
功耗管理模块
circuit design
Internet of Things
So C
ultra-low power consumption
power gating
clock gating
power management module
