摘要
针对发射机需要实现多个频率播音的需求,射频处理和射频分配单元需要自适应不同的载波频率。设计数字射频处理方案,以满足不同播音频率的需求。该方案基于现场可编程门阵列(Field Programmable Gate Array,FPGA)锁相环(Phase Locked Loop,PLL)技术,利用输入标准的倍频中波载频,设计锁相环模块和分频模块,得到信号处理所需的载波时钟、音频信号采样率转换时钟以及复合音频信号发送所需的高速串行时钟。实际运行测试结果表明,该方案可以实现复合音频信号与载波射频信号同步输出,控制功放模块的开通与关断。同时,该方案可以满足不同播音频率的切换,无须更改射频处理模块,通用性较高。
In view of the requirement that the transmitter needs to broadcast at multiple frequencies,the RF processing and RF distribution unit needs to adapt to different carrier frequencies.Design a digital RF processing scheme to meet the needs of different broadcasting frequencies.Based on the Phase Locked Loop(PLL)technology of Field Programmable Gate Array(FPGA),this scheme designs a phase-locked loop module and a frequency division module by using the input standard frequency-doubled wave carrier frequency,and obtains the carrier clock needed for signal processing,the sampling rate conversion clock of audio signal and the high-speed serial clock needed for composite audio signal transmission.The practical test results show that the scheme can realize the synchronous output of composite audio signal and carrier RF signal,and control the turn-on and turn-off of power amplifier module.At the same time,the scheme can satisfy the switching of different broadcasting frequencies without changing the RF processing module,and it is highly universal.
作者
潘杰
李茂全
PAN Jie;LI Maoquan(Jiangxi Technician College,Nanchang 330200,China;Jiangxi Provincial Information Center of Flood Control,Nanchang 330009,China)
出处
《电声技术》
2023年第4期108-111,共4页
Audio Engineering
关键词
现场可编程门阵列(FPGA)
射频处理
射频分配
锁相环(PLL)
载波同步
Field Programmable Gate Array(FPGA)
radio frequency processing
radio frequency distribution
Phase Locked Loop(PLL)
carrier synchronization
