摘要
基于28 nm互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)工艺实现了一种应用于毫米波雷达接收机的小型化模拟基带电路,该电路包括三级内嵌有直流失调消除(DC Offset Cancellation,DCOC)电路的可编程增益放大器和六阶巴特沃斯型低通滤波器,实现可重构的增益和带宽.在模拟基带中采用可复用的电阻和电容阵列,并在直流失调消除环路中引入工作在亚阈值区的晶体管作为有源电阻,大幅减小了芯片的面积.测试结果表明,该模拟基带在0.1 mm^(2)的面积下实现了-0.6~68.4 dB的增益范围、5.8 dB的增益步进、500 kHz~17 MHz的带宽调节范围和22.4 dBm的输出三阶交调点,在1.8 V电源电压下消耗的功耗为12 mW.
A compact analog baseband for the millimeter⁃wave radar receiver is implemented on a 28 nm CMOS(Complementary Metal Oxide Semiconductor)process.The circuit consists of a three⁃stage programmable gain amplifier which is embedded with DCOC(DC Offset Cancellation)loops and a sixth⁃order Butterworth low⁃pass filter,enabling reconfigurable gain and bandwidth.Reusable resistor and capacitor arrays are used in the analog baseband,and transistors operating in the subthreshold region are introduced as active resistors into the DCOC loops,which significantly reduce the chip area.The measurement results show that the analog baseband with an area of 0.01 mm^(2) provides a gain range of-0.6 to 68.4 dB with a gain step of 5.8 dB,and a bandwidth adjustment range of 500 kHz to 17 MHz.It achieves an output third⁃order intercept point of 22.4 dBm and consumes a power of 12 mW from a 1.8 V supply voltage.
作者
李菲
马凯学
刘兵
张新
Li Fei;Ma Kaixue;Liu Bing;Zhang Xin(School of Microelectronics,Tianjin University,Tianjin,300072,China)
出处
《南京大学学报（自然科学版）》
CAS
CSCD
北大核心
2024年第4期633-641,共9页
Journal of Nanjing University（Natural Science）
基金
国家重点研发计划(2018YFB2202500)。
