摘要
定量分析了数字式锁相倍频器输出信号的相位抖动 .针对抖动产生的两个主要原因 ,在环路前和环路中分别插入窄带滤波器和辅助环路滤波器 .此外 ,利用一个基本的锁相环路作为跟踪式相位滤波器 。
The phase jitter of output signal of the PLL(phase locked loop) frequency doubler is analyzed. Against two primary reasons, a narrow filter and a assistant loop filter are used ahead and in the loop. At last, using a basic PLL as a tracing phase filter, the output spectrum of the frequency doubler is further purified.
出处
《武汉大学学报（工学版）》
CAS
CSCD
北大核心
2002年第6期81-84,共4页
Engineering Journal of Wuhan University
