摘要
信息安全体系中的消息验证是一个非常重要的方面。采用以散列函数为基础的消息验证编码是其中的一种重要方法。现提出了硬件实现一种以MD5算法为基础的消息验证编码 (HMAC MD5)的电路结构。该电路结构通过对MD5核心运算模块的复用 ,缩小了电路规模 ,达到了较高的处理速度。用VerilogHDL描述电路结构 。
Message authentication is a very important technique in information security. The key of authentication is the use of a message authentication code (MAC), which is based on using a hash function. In this paper, we propose a kind of circuit architecture for a message authentication code that is based on the Message Digest 5 (MD5) algorithm. In this architecture, we reduce the size of the circuits and get higher process speed by reusing the iterative core of the MD5. The circuits of the design are expressed in VerilogHDL, and are verified by FPGA.
出处
《电子器件》
CAS
2003年第1期66-70,共5页
Chinese Journal of Electron Devices
关键词
信息安全
消息验证机制
HMAC
MD5算法
information security
message authentication mechanism
keyed Hashing for Message Authentication (HMAC)
Message Digest 5 algorithm (MD5)
