摘要
为了满足对雷达信号高速采集的要求 ,设计了一个基于 1 6位 ISA总线的 3 0 MSPS的双通道数据采集卡。该采集卡的最大特点是可以由程序设定每次同步触发后的采样延迟时间和采样的点数。本文对 A/ D转换及其接口电路 ,D/ A转换电路存储器接口电路及延迟采样控制电路进行了详细论述。
A bi-channel 30MSPS data acquisition card based on the 16-bit ISA bus is designed to meet the requirements of high-speed radar signal processing. The main features of the card show that it can set delay-time and the length of acquisition after triggering. The A/D interface circuit, D/A circuit, memory interface circuit, and delay sampling control circuit are described.
出处
《数据采集与处理》
CSCD
2003年第3期323-326,共4页
Journal of Data Acquisition and Processing
