摘要
目前EPON的物理层(其中包含物理编码子层)在上行方向尚无ASIC芯片可以直接使用.该文提出了EPON物理编码子层在上行方向的设计思想,并用FPGA实现.功能仿真的结果验证了该设计逻辑功能的正确性.
Up to now no ASIC chips can be applied to EPON upstream physical layer directly, neither can PCS sublayer. Therefore it is important to develop a programmable chip for this application. This paper deals with an implementation of PCS sublayer in upstream by using FPGA. The design approach is proposed and simulation results presented.
出处
《上海大学学报（自然科学版）》
CAS
CSCD
2003年第5期414-419,共6页
Journal of Shanghai University:Natural Science Edition
基金
上海市重点学科建设资助项目
上海市光科技专项 (0 1 2 2 6 1 0 1 3 )资助项目
关键词
基于以太网的无源光网络
物理编码子层
物理媒体接入子层
物理介质相关子层
8810B编译码
同步
状态机
EPON(Ethernet based Passive Optical Network)
PCS(Physical Coding Sublayer)
PMA(Physical Medium Attachment)
PMD(Physical Medium Dependent Sublayer)
8B10B encoder and decoder
synchronization
state machine
