期刊文献+

电容层析成像中的电极集成化设计

Integrated Electrodes for Electrical Capacitance Tomography
下载PDF
导出
摘要 设计了一种电容层析成像电路,它直接安装在电极上,可以减小杂散电容的影响.通过增加工作频率,可提高灵敏度.电极与基于CMOS的充放电电路及数字控制电路整合在一起,为数字化通讯提供了快速、安全、有效的数据传输,并通过移位寄存器与主机进行数据交流. This paper describes the design of circuitry that can be mounted directly on the electrodes in an electrical capacitance tomography system such that the effects of stray capacitance are reduced. This allows increased operating frequencies to be employed which leads to improvements isensitivity. These integrated electrodes are based on custom CMOS capacitance transducers that utilize the charge - discharge circuit with differential amplification, offset compensation and analogue -to -digital conversion. Digital, bit-serial, communications allow fast, reliable and efficient transfer of data. Data communication with the host is via a serial shift register.
出处 《哈尔滨理工大学学报》 CAS 2004年第1期37-39,共3页 Journal of Harbin University of Science and Technology
基金 黑龙江省重点科技攻关项目(GC02A126) 黑龙江省自然科学基金(F01-25) 哈尔滨市学科后备带头人基金(20003AFXXHJ015).
关键词 电容层析成像 电极 集成电路 电容传感器 integrated circuit capacitance electrical capacitance tomography
  • 相关文献

参考文献3

  • 1YANG W Q,Hardware Design of Electrical Capacitance Tomography Systems [J].Measurement Science & Technology,1996,7(3): 225 - 232.
  • 2YORK T A.Custom Silicon for Tomographic Instrumentation[J].Measurement Science & Technology,1996,7(3):308-313.
  • 3YANG W Q.Key Features of a Newly-designed Capacitance Tomography System [C].FLOMEKO'96,Beijing,1996.480-485.

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部