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一种CMOS高速采样/保持放大器 被引量:4

A CMOS High-Speed Sample-and-Hold Amplifier
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摘要  文章分析了采样/保持电路的基本原理,设计了一种CMOS高速采样/保持放大器,采样频率可达到50MHz,并用TSMC的0.35μm标准CMOS工艺库模拟了整体电路和分块电路的性能。 The fundamental theory of the sample and hold circuit is analyzed, and a CMOS high-speed sample-and-hold amplifier is designed, for which a sampling rate of 50 Msample/s has been achieved. The circuit, as well as its blocks, is simulated, in TSMC 's 0.35 μm standard CMOS process using Hspice.
出处 《微电子学》 CAS CSCD 北大核心 2004年第3期310-313,共4页 Microelectronics
关键词 CMOS 采样/保持电路 运算放大器 模拟/数字转换器 自举开关 CMOS Sample/hold circuit Operational amplifier Analog-to-digital converter Bootstrapped switch
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参考文献5

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同被引文献22

  • 1程胜勇,刘暾东.CS5534型A/D转换器及其在高精度模拟量采集卡中的应用[J].微计算机信息,2006(04Z):232-233. 被引量:3
  • 2许长喜.高阶模拟Σ-Δ调制器设计研究[J].微电子学,2006,36(2):154-158. 被引量:3
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