通过二维器件仿真,分析单指、多指18V nLDMOS器件在静电放电防护中电流分布的非均匀性问题。经仿真分析可知,寄生三极管的部分导通是单指器件电流分布不均匀的原因;器件的大面积特征、材料本身的不均匀性等因素导致叉指不同时触发,同时...通过二维器件仿真,分析单指、多指18V nLDMOS器件在静电放电防护中电流分布的非均匀性问题。经仿真分析可知,寄生三极管的部分导通是单指器件电流分布不均匀的原因;器件的大面积特征、材料本身的不均匀性等因素导致叉指不同时触发,同时,由于nLDMOS各叉指基极被深N阱隔离,先被触发的叉指无法抬高未触发叉指的基极电位帮助其开启,是多指器件电流分布不均匀的原因。器件的TLP(Transmission line pulse)测试结果与仿真分析吻合,指长分别为50μm和90μm的单指器件ESD电流泄放能力分别为21mA/μm和15mA/μm;指长为50μm的单指、双指、四指和八指器件的ESD失效电流分别为1.037A、1.055A、1.937A和1.710A,不与指数成比例增大。展开更多
A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite direc- tions. The triggering voltages of four types of dual direction SCRs （DDSCR） are compared and analyzed, pMOS...A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite direc- tions. The triggering voltages of four types of dual direction SCRs （DDSCR） are compared and analyzed, pMOS or nMOS are embedded into the structures to adjust their triggering voltages. Both MOSFETs embedded DDSCRs have tunable triggering voltage,low DC leakage （～pA）, and fast turn on speed snapback I-V characteristics without latch-up problem. It achieves high ESD performance of ～94V/μm. The new ESD protection devices are area efficient and can reduce the parasitic effects significantly.展开更多
文摘通过二维器件仿真,分析单指、多指18V nLDMOS器件在静电放电防护中电流分布的非均匀性问题。经仿真分析可知,寄生三极管的部分导通是单指器件电流分布不均匀的原因;器件的大面积特征、材料本身的不均匀性等因素导致叉指不同时触发,同时,由于nLDMOS各叉指基极被深N阱隔离,先被触发的叉指无法抬高未触发叉指的基极电位帮助其开启,是多指器件电流分布不均匀的原因。器件的TLP(Transmission line pulse)测试结果与仿真分析吻合,指长分别为50μm和90μm的单指器件ESD电流泄放能力分别为21mA/μm和15mA/μm;指长为50μm的单指、双指、四指和八指器件的ESD失效电流分别为1.037A、1.055A、1.937A和1.710A,不与指数成比例增大。
基金the Natural Science Foundation of Jiangsu Province(No.BK2007026)the Natural Science Foundation of Zhejiang Province(No.Y107055)~~
文摘A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite direc- tions. The triggering voltages of four types of dual direction SCRs （DDSCR） are compared and analyzed, pMOS or nMOS are embedded into the structures to adjust their triggering voltages. Both MOSFETs embedded DDSCRs have tunable triggering voltage,low DC leakage （～pA）, and fast turn on speed snapback I-V characteristics without latch-up problem. It achieves high ESD performance of ～94V/μm. The new ESD protection devices are area efficient and can reduce the parasitic effects significantly.
