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SRV constraint based FIB design for wideband linear array 被引量:3
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作者 Peng Chen Yihui Liang +2 位作者 chaohuan hou Xiaochuan Ma Dapeng Liu 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 2010年第6期941-947,共7页
Frequency-invariant beamformer (FIB) design is a key issue in wideband array signal processing. To use commonly wideband linear array with tapped delay line (TDL) structure and complex weights, the FIB design is p... Frequency-invariant beamformer (FIB) design is a key issue in wideband array signal processing. To use commonly wideband linear array with tapped delay line (TDL) structure and complex weights, the FIB design is provided according to the rule of minimizing the sidelobe level of the beampattern at the reference frequency while keeping the distortionless response constraint in the mainlobe direction at the reference frequency, the norm constraint of the weight vector and the amplitude constraint of the averaged spatial response variation (SRV). This kind of beamformer design problem can be solved with the interior-point method after being converted to the form of standard second order cone programming (SOCP). The computer simulations are presented which illustrate the effectiveness of our FIB design method for the wideband linear array with TDL structure and complex weights. 展开更多
关键词 tapped delay line (TDL) wideband linear array frequency invariant beamformer (FIB) spatial response variation (SRV) second order cone programming (SOCP).
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Exploiting write power asymmetry to improve phase change memory system performance
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作者 Qi WANG Donghui WANG chaohuan hou 《Frontiers of Computer Science》 SCIE EI CSCD 2015年第4期566-575,共10页
Phase change memory (PCM) is a promising can- didate to replace DRAM as main memory, thanks to its bet- ter scalability and lower static power than DRAM. However, PCM also presents a few drawbacks, such as long writ... Phase change memory (PCM) is a promising can- didate to replace DRAM as main memory, thanks to its bet- ter scalability and lower static power than DRAM. However, PCM also presents a few drawbacks, such as long write la- tency and high write power. Moreover, the write commands parallelism of PCM is restricted by instantaneous power con- straints, which degrades write bandwidth and overall perfor- mance. The write power of PCM is asymmetric: writing a zero consumes more power than writing a one. In this paper, we propose a new scheduling policy, write power asymme- try scheduling (WPAS), that exploits the asymmetry of write power. WPAS improves write commands parallelism of PCM memory without violating power constraint. The evaluation results show that WPAS can improve performance by up to 35.5%, and 18.5% on average. The effective read latency can be reduced by up to 33.0%, and 17.1% on average. 展开更多
关键词 phase change memory write power asymmetry command scheduling
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