Polar codes have become increasingly popular recently because of their capacity achieving property.In this paper,a memory efficient stage-combined belief propagation(BP) decoder design for polar codes is presented.Fir...Polar codes have become increasingly popular recently because of their capacity achieving property.In this paper,a memory efficient stage-combined belief propagation(BP) decoder design for polar codes is presented.Firstly,we briefly reviewed the conventional BP decoding algorithm.Then a stage-combined BP decoding algorithm which combines two adjacent stages into one stage and the corresponding belief message updating rules are introduced.Based on this stage-combined decoding algorithm,a memory-efficient polar BP decoder is designed.The demonstrated decoder design achieves 50%memory and decoding latency reduction in the cost of some combinational logic complexity overhead.The proposed decoder is synthesized under TSMC 45 nm Low Power CMOS technology.It achieves 0.96 Gb/s throughput with 14.2mm^2 area when code length N=2^(16)which reduces 51.5%decoder area compared with the conventional decoder design.展开更多
An Efficient and flexible implementation of block ciphers is critical to achieve information security processing.Existing implementation methods such as GPP,FPGA and cryptographic application-specific ASIC provide the...An Efficient and flexible implementation of block ciphers is critical to achieve information security processing.Existing implementation methods such as GPP,FPGA and cryptographic application-specific ASIC provide the broad range of support.However,these methods could not achieve a good tradeoff between high-speed processing and flexibility.In this paper,we present a reconfigurable VLIW processor architecture targeted at block cipher processing,analyze basic operations and storage characteristics,and propose the multi-cluster register-file structure for block ciphers.As for the same operation element of block ciphers,we adopt reconfigurable technology for multiple cryptographic processing units and interconnection scheme.The proposed processor not only flexibly accomplishes the combination of multiple basic cryptographic operations,but also realizes dynamic configuration for cryptographic processing units.It has been implemented with0.18μm CMOS technology,the test results show that the frequency can reach 350 MHz.and power consumption is 420 mw.Ten kinds of block and hash ciphers were realized in the processor.The encryption throughput of AES,DES,IDEA,and SHA-1 algorithm is1554 Mbps,448Mbps,785 Mbps,and 424 Mbps respectively,the test result shows that our processor's encryption performance is significantly higher than other designs.展开更多
In order to establish an effective wireless communication system in an underground coal-mine environment, the propagation of radio waves through a rectangular-like mine tunnel was investigated by jointly, considering ...In order to establish an effective wireless communication system in an underground coal-mine environment, the propagation of radio waves through a rectangular-like mine tunnel was investigated by jointly, considering both the dielectric constant and the reflectance of a mine tunnel. By combining free space and modified waveguide propagation models, we propose a new hybrid propagation model based on ray tracing. Simulation results have shown the effectiveness of establishing a wireless Local Area Network (LAN) in this coal-mine environment. The results of this research will be very useful as a guide in the design and development of tunnel wireless LAN systems.展开更多
基金jointly supported by the National Nature Science Foundation of China under Grant No.61370040 and 61006018the Fundamental Research Funds for the Central Universities+1 种基金the Priority Academic Program Development of Jiangsu Higher Education InstitutionsOpen Project of State Key Laboratory of ASIC & System(Fudan University)12KF006
文摘Polar codes have become increasingly popular recently because of their capacity achieving property.In this paper,a memory efficient stage-combined belief propagation(BP) decoder design for polar codes is presented.Firstly,we briefly reviewed the conventional BP decoding algorithm.Then a stage-combined BP decoding algorithm which combines two adjacent stages into one stage and the corresponding belief message updating rules are introduced.Based on this stage-combined decoding algorithm,a memory-efficient polar BP decoder is designed.The demonstrated decoder design achieves 50%memory and decoding latency reduction in the cost of some combinational logic complexity overhead.The proposed decoder is synthesized under TSMC 45 nm Low Power CMOS technology.It achieves 0.96 Gb/s throughput with 14.2mm^2 area when code length N=2^(16)which reduces 51.5%decoder area compared with the conventional decoder design.
基金supported by National Natural Science Foundation of China with granted No.61404175
文摘An Efficient and flexible implementation of block ciphers is critical to achieve information security processing.Existing implementation methods such as GPP,FPGA and cryptographic application-specific ASIC provide the broad range of support.However,these methods could not achieve a good tradeoff between high-speed processing and flexibility.In this paper,we present a reconfigurable VLIW processor architecture targeted at block cipher processing,analyze basic operations and storage characteristics,and propose the multi-cluster register-file structure for block ciphers.As for the same operation element of block ciphers,we adopt reconfigurable technology for multiple cryptographic processing units and interconnection scheme.The proposed processor not only flexibly accomplishes the combination of multiple basic cryptographic operations,but also realizes dynamic configuration for cryptographic processing units.It has been implemented with0.18μm CMOS technology,the test results show that the frequency can reach 350 MHz.and power consumption is 420 mw.Ten kinds of block and hash ciphers were realized in the processor.The encryption throughput of AES,DES,IDEA,and SHA-1 algorithm is1554 Mbps,448Mbps,785 Mbps,and 424 Mbps respectively,the test result shows that our processor's encryption performance is significantly higher than other designs.
基金supported by the National Natural Science Foundation of China (No.10974044)the Open Project of the Key Lab of the Technique of Electricity Transmission, Distribution and Conservation in Changzhou, China
文摘In order to establish an effective wireless communication system in an underground coal-mine environment, the propagation of radio waves through a rectangular-like mine tunnel was investigated by jointly, considering both the dielectric constant and the reflectance of a mine tunnel. By combining free space and modified waveguide propagation models, we propose a new hybrid propagation model based on ray tracing. Simulation results have shown the effectiveness of establishing a wireless Local Area Network (LAN) in this coal-mine environment. The results of this research will be very useful as a guide in the design and development of tunnel wireless LAN systems.
