Cascade Integrator Comb(CIC) filter is the main part of the next generation High Frequency (HF) radar. This paper describes the key points of CIC theory in the Digital Down Conversion (DDC) module of a radar receiver,...Cascade Integrator Comb(CIC) filter is the main part of the next generation High Frequency (HF) radar. This paper describes the key points of CIC theory in the Digital Down Conversion (DDC) module of a radar receiver, and takes advantage of the high flexibility and high density feature of Field Programmable Gate Array (FPGA) for putting forth to design the CIC filter by using FPGA. This paper provides particular insight into design by FPGA, which has advantages in high speed operation and simply structure. Some important and practical applications are given in this paper. The simulation result proves the validity and veracity. Because we can adjust the parameters freely according to our need, the CIC filter can be adapted to the next generation HF radar. Key words FPGA - DDC - CIC filter - HF radar CLC number TN 47 Foundation item: Supported by the 863 High Technology Project of China(2001AA631050)Biography: MA Zhi-gang(1978-), male, Ph. D candidate, research direction: software radio and EDA design.展开更多
针对超大规模集成电路的发展以及无线射频芯片中带宽可变的需求,提出一种低功耗可配置级联积分梳状(Cascade Integral Comb, CIC)滤波器结构。该结构采用半字节串行算法优化ASIC电路内部位宽,借助多路复用技术减少运算逻辑和存储逻辑单...针对超大规模集成电路的发展以及无线射频芯片中带宽可变的需求,提出一种低功耗可配置级联积分梳状(Cascade Integral Comb, CIC)滤波器结构。该结构采用半字节串行算法优化ASIC电路内部位宽,借助多路复用技术减少运算逻辑和存储逻辑单元,并在增益校正部分采用正则有符号数(Canonic Signed Digit, CSD)编码乘法代替全位宽二进制补码乘法,从而实现低功耗目的。信道带宽配置模块选取CIC滤波器采样因子,实现带宽可变功能。通过MATLAB Simulink搭建抽取滤波器模型以验证算法可行性,并采用verilog HDL完成代码设计,仿真结果表明该滤波器可实现2~16倍下采样。基于65 nm COMS标准单元工艺库进行DC综合和ASIC版图设计,与传统CIC滤波器比较,数字电路在功耗方面具有显著优势。展开更多
文摘Cascade Integrator Comb(CIC) filter is the main part of the next generation High Frequency (HF) radar. This paper describes the key points of CIC theory in the Digital Down Conversion (DDC) module of a radar receiver, and takes advantage of the high flexibility and high density feature of Field Programmable Gate Array (FPGA) for putting forth to design the CIC filter by using FPGA. This paper provides particular insight into design by FPGA, which has advantages in high speed operation and simply structure. Some important and practical applications are given in this paper. The simulation result proves the validity and veracity. Because we can adjust the parameters freely according to our need, the CIC filter can be adapted to the next generation HF radar. Key words FPGA - DDC - CIC filter - HF radar CLC number TN 47 Foundation item: Supported by the 863 High Technology Project of China(2001AA631050)Biography: MA Zhi-gang(1978-), male, Ph. D candidate, research direction: software radio and EDA design.
