In web-based learning environment,College English writing has always been a thorny issue.Here both asynchronous and synchronous communications in college English writing mean the new interactive teaching belief. This ...In web-based learning environment,College English writing has always been a thorny issue.Here both asynchronous and synchronous communications in college English writing mean the new interactive teaching belief. This paper attempts to do the blending of two in the traditional writing learning and teaching in college English in order to promote a more flexible,efficient and interactive learning environment in accordance with students' interests and needs.展开更多
The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents...The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents an architecture designed to improve the speed and power limitations of high-performance computing systems using superconducting technology.Since superconducting microprocessors,which operate at cryogenic temperatures,require support from semiconductor cir-cuits,the proposed design utilizes the von Neumann architecture with a superconducting RSFQ mi-croprocessor,cryogenic semiconductor memory,a room temperature field programmable gate array(FPGA)controller,and a host computer for input/output.Additionally,the paper introduces two key circuit designs:a start/stop controllable superconducting clock generator and an asynchronous communication interface between the RSFQ and semiconductor chips used to implement the control system.Experimental results demonstrate that the proposed design is feasible and effective,provi-ding valuable insights for future superconducting computer systems.展开更多
Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these ci...Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these circuits make the system more robust and flexible. These circuits have compact architectures and are of higher performance. Besides, compared with other handshaking circuits, these designs are more suitable for FPGA.展开更多
Automation has arrived in the low voltage grid domain. In the next few years, the secondary substation—at the barriers of medium and low voltage grids—will thus be upgraded to enable novel functions. In this paper, ...Automation has arrived in the low voltage grid domain. In the next few years, the secondary substation—at the barriers of medium and low voltage grids—will thus be upgraded to enable novel functions. In this paper, we present various smart grid applications running on such intelligent secondary substations(iSSN) including their interaction with each other. We integrate energy consumption and production data, as well as forecasts, sensed from the smart buildings’ energy management systems(BEMSs) into the operation of the low voltage grid. A suitable framework for those modular applications includes features to initiate their installation, update, removal, the remote operator site, and not requiring staff on-site for such typical reappearing maintenance tasks.展开更多
This paper presents an approach to build a communication behavioural semantic model for heterogeneous distributed systems that include synchronous and asynchronous communications. Since each node of such system has it...This paper presents an approach to build a communication behavioural semantic model for heterogeneous distributed systems that include synchronous and asynchronous communications. Since each node of such system has its own physical clock, it brings the challenges of correctly specifying the system time constraints. Based on the logical clocks proposed by Lamport, and CCSL proposed by Aoste team in INRIA, as well as pNets from Oasis team in INRIA, we develop timed-pNets to model communication behaviours for distributed systems. Timed-pNets are tree style hierarchical structures. Each node is associated with a timed specification which consists of a set of logical clocks and some relations on clocks. The leaves are represented by timed-pLTSs. Non-leaf nodes （called timed-pNets nodes） are synchronisation devices that synchronize the behaviours of subnets （these subnets can be leaves or non-leaf nodes）. Both timed-pLTSs and timed-pNets nodes can be translated to timed specifications. All these notions and methods are illustrated on a simple use-case of car insertion from the area of intelligent transportation systems （ITS）. In the end the TimeSquare tool is used to simulate and check the validity of our model.展开更多
The transmission antennas of cooperative systems are spatially distributed on multiple nodes, so the received signal can be asynchronous due to propagation delays. A receiving scheme for cooperative relay networks is ...The transmission antennas of cooperative systems are spatially distributed on multiple nodes, so the received signal can be asynchronous due to propagation delays. A receiving scheme for cooperative relay networks is proposed, multiple asynchronous signals are reconstructed at the receiver by forward and backward interference cancellation, which can obtain gains of cooperative transmission diversity with obvious delay and with no requiring timing synchronization or orthogonal channelization between relays. Analysis and simulation show that the bit error rate（BER） of the proposed scheme is similar to Alamouti code, and the scheme has the diversity order of orthogonal transmission scheme accompanied by minimal BER losses. It is demonstrated that the performance can be further improved by adding an error correcting code（ECC）.展开更多
文摘In web-based learning environment,College English writing has always been a thorny issue.Here both asynchronous and synchronous communications in college English writing mean the new interactive teaching belief. This paper attempts to do the blending of two in the traditional writing learning and teaching in college English in order to promote a more flexible,efficient and interactive learning environment in accordance with students' interests and needs.
基金the Strategic Priority Research Program of Chinese Academy of Sciences(No.XDA18000000)the National Natural Science Foundation of China(No.61732018,61872335).
文摘The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents an architecture designed to improve the speed and power limitations of high-performance computing systems using superconducting technology.Since superconducting microprocessors,which operate at cryogenic temperatures,require support from semiconductor cir-cuits,the proposed design utilizes the von Neumann architecture with a superconducting RSFQ mi-croprocessor,cryogenic semiconductor memory,a room temperature field programmable gate array(FPGA)controller,and a host computer for input/output.Additionally,the paper introduces two key circuit designs:a start/stop controllable superconducting clock generator and an asynchronous communication interface between the RSFQ and semiconductor chips used to implement the control system.Experimental results demonstrate that the proposed design is feasible and effective,provi-ding valuable insights for future superconducting computer systems.
文摘Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these circuits make the system more robust and flexible. These circuits have compact architectures and are of higher performance. Besides, compared with other handshaking circuits, these designs are more suitable for FPGA.
基金supported by the Austrian Ministry for Transport,Innovation and Technology(BMVIT)the Austrian Research Promotion Agency(FFG)under Grant No.849902the Austrian Climate and Energy Fund(KLIEN)under Grant No.846141
文摘Automation has arrived in the low voltage grid domain. In the next few years, the secondary substation—at the barriers of medium and low voltage grids—will thus be upgraded to enable novel functions. In this paper, we present various smart grid applications running on such intelligent secondary substations(iSSN) including their interaction with each other. We integrate energy consumption and production data, as well as forecasts, sensed from the smart buildings’ energy management systems(BEMSs) into the operation of the low voltage grid. A suitable framework for those modular applications includes features to initiate their installation, update, removal, the remote operator site, and not requiring staff on-site for such typical reappearing maintenance tasks.
基金This work was partially funded by the INRIA Associated Team DAESD between INRIA and ECNU by the National Basic Research Program of China （973 Program） （2011CB302802）+1 种基金 by the National Natural Science Foundation of China （Grant Nos. 61321064 and 61370100） by Shanghai Knowledge Service Platform Project （ZF1213）. We give great thanks to Frederic Mallet and Jalien Deantoni who took time to discuss with us and gave us bunches of advices. We are also indebted to the anonymous referees for their suggested improvements.
文摘This paper presents an approach to build a communication behavioural semantic model for heterogeneous distributed systems that include synchronous and asynchronous communications. Since each node of such system has its own physical clock, it brings the challenges of correctly specifying the system time constraints. Based on the logical clocks proposed by Lamport, and CCSL proposed by Aoste team in INRIA, as well as pNets from Oasis team in INRIA, we develop timed-pNets to model communication behaviours for distributed systems. Timed-pNets are tree style hierarchical structures. Each node is associated with a timed specification which consists of a set of logical clocks and some relations on clocks. The leaves are represented by timed-pLTSs. Non-leaf nodes （called timed-pNets nodes） are synchronisation devices that synchronize the behaviours of subnets （these subnets can be leaves or non-leaf nodes）. Both timed-pLTSs and timed-pNets nodes can be translated to timed specifications. All these notions and methods are illustrated on a simple use-case of car insertion from the area of intelligent transportation systems （ITS）. In the end the TimeSquare tool is used to simulate and check the validity of our model.
基金supported by the National Science&Technology Major Projects(2012ZX03001031-004)the Fundamental Research Funds for the Central Universities(2012RC0105)
文摘The transmission antennas of cooperative systems are spatially distributed on multiple nodes, so the received signal can be asynchronous due to propagation delays. A receiving scheme for cooperative relay networks is proposed, multiple asynchronous signals are reconstructed at the receiver by forward and backward interference cancellation, which can obtain gains of cooperative transmission diversity with obvious delay and with no requiring timing synchronization or orthogonal channelization between relays. Analysis and simulation show that the bit error rate（BER） of the proposed scheme is similar to Alamouti code, and the scheme has the diversity order of orthogonal transmission scheme accompanied by minimal BER losses. It is demonstrated that the performance can be further improved by adding an error correcting code（ECC）.
