The automation process is a very important pillar for Industry 4.0.One of the first steps is the control of motors to improve production efficiency and generate energy savings.In mass production industries,techniques ...The automation process is a very important pillar for Industry 4.0.One of the first steps is the control of motors to improve production efficiency and generate energy savings.In mass production industries,techniques such as digital signal processing(DSP)systems are implemented to control motors.These systems are efficient but very expensive for certain applications.From this arises the need for a controller capable of handling AC and DC motors that improves efficiency and maintains low energy consumption.This project presents the design of an adaptive control system for brushless AC induction and DC motors,which is functional to any type of plant in the industry.The design was possible by implementing Matlab software and tools such as digital signal processor(DSP)and Simulink.Through an extensive investigation of the state of the art,three models needed to represent the control system have been specified.The first model for the AC motor,the second for the DC motor and the third for the DSP control;this is done in this way so that the probability of failure is lower.Subsequently,these models have been programmed in Simulink,integrating the three main models into one.In this way,the design of a controller for use in AC induction motors,specifically squirrel cage and brushless DC motors,has been achieved.The final model represents a response time of 0.25 seconds,which is optimal for this type of application,where response times of 2e-3 to 3 seconds are expected.展开更多
This paper presents a design method of ByPassing Unit(BPU) in 32-bit Digital Signal Processor(DSP)-MD32. MD32 is realized in 0,18μm technology, 1.8V and 200 MHz working clock. It focuses on the Reduced Instruction Se...This paper presents a design method of ByPassing Unit(BPU) in 32-bit Digital Signal Processor(DSP)-MD32. MD32 is realized in 0,18μm technology, 1.8V and 200 MHz working clock. It focuses on the Reduced Instruction Set Computer(RISC) architecture and DSP computation capability thoroughly, extends DSP with various addressing modes in a customized DSP pipeline stage architecture. The paper also discusses the architecture and circuit design of bypassing logic to fit MD32 architecture. The parallel execution of BPU with instruction decode in architecture level is applied to reduce time delay. The optimization of circuit that serial select with priority is analyzed in detail, and the result shows that about half of time delay is reduced after this optimization. Examples show that BPU is useful for improving the DSP's performance.The forwarding logic in MD32 realizes 8 data channels feedback and meets the working clock limit.展开更多
A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor （DSP） is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system ...A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor （DSP） is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system combines the merits of intelligent control with DSP digital control. The fuzzy logic intelligent control system designed is a typical two-input-single-output structure, and regards the error and the change in error of peak arc voltage as two inputs and the background time as single output. The fuzzy logic intelligent control system is realized in a look-up table （LUT） method by using MATLAB based fuzzy logic toolbox, and the implement of LUT method based on DSP is also discussed. The pulsed MAG welding experimental results demonstrate that the developed fuzzy logic intelligent control system based on DSP has strong arc length controlling ability to accomplish the stable pulsed MAG welding process and controls pulsed MAG welding inverter digitally and intelligently.展开更多
The relativity of instructions of motor control digital signal processor (MCDSP) in the design is analyzed. A method for obtaining a minimum instruction set in plac e of the complete instruction set during generatio...The relativity of instructions of motor control digital signal processor (MCDSP) in the design is analyzed. A method for obtaining a minimum instruction set in plac e of the complete instruction set during generation of testing procedures is giv en in terms of the processor presentation matrix between micro-operators and in structions of MCDSP.展开更多
A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and co...A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and constructional features of the whole digital control were presented. The resources of the DSP chip were efficiently utilized and the circuits are very concise, which can enhance the stability and reliability of welding inverter. Experimental results demonstrate that the developed digital control has the ability to accomplish the excellent pulsed gas metal arc welding process and the merits of the developed digital control are stable welding process, little spatter and perfect weld appearance.展开更多
With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption ...With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.展开更多
The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power...The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.展开更多
This paper proposes a cochlear prosthetic system with an implanted digital signal processor （DSP）. This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limit...This paper proposes a cochlear prosthetic system with an implanted digital signal processor （DSP）. This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limitation and suitable for future development. By optimizing the speech processing algorithm and the DSP hardware design, the implanted DSP manages to execute the continuous interleaved sampling （CIS） algorithm at a clock frequency of 3MHz and a power consumption of only 1.91mW. With an analytic power-transmission efficiency of the wireless inductive link （40%）, the power overhead caused by the implanted DSP is derived as 2.87roW,which is trivial when compared with the power consumption of existing cochlear prosthetic systems （tens of milliwatts）. With the DSP implanted,this new system can.be easily developed into a fully implanted cochlear prosthesis.展开更多
The functions and characteristics of software radio are discussed. Using techniques and method of software radio, the concept and advantages of a new kind of radio fuze, software radio fuze, are analysed. Several kind...The functions and characteristics of software radio are discussed. Using techniques and method of software radio, the concept and advantages of a new kind of radio fuze, software radio fuze, are analysed. Several kinds of hardware platform structures of the software radio fuze are studied and the key techniques are analysed. The software radio fuze will become the most promising radio fuze techniques in 21st century.展开更多
The design and development of the traction controller for electric vehicle is introduced, which is based on the induction motor. This drive is developed by using a digital signal processor at low cost and carried out ...The design and development of the traction controller for electric vehicle is introduced, which is based on the induction motor. This drive is developed by using a digital signal processor at low cost and carried out with the module design concept of both software and hardware. Nevertheless, a scheme of the sensorless direct torque control is based on the developed hardware, of which the feasibility is tested by a trial program. Additionally, both the interface function of the drive hardware and the feasibility of its software are proved to be good by the trail programs. A test motor can run about 18?r/min by a variable frequency program with the space vector pulse width modulation technology, of which the torque is visible pulsatile. In this presentation, based on the theoretical approach, the sensorless torque control is to be studied and applied to electric vehicles, of which the quick, smooth and stable torque response is emphasized because it quite benefits improving the drive performance of electric vehicles.展开更多
A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor （ DSP ） is used to realize power factor correction and control of back-stag...A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor （ DSP ） is used to realize power factor correction and control of back-stage inverter bridge of the arc welding inverter. The fore-stage adopts double closed loop proportion and integration （PI） rectifier technique and the back- stage adopts digital pulse width modulation （ PWM） technique. Simulated waves can be obtained in Matlab/Simulink and validated by experiments. Experiments of the prototype showed that the total harmonic distortion （THD） can be controlled within 10% and the power factor is approximate to 1.展开更多
Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common buildi...Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.展开更多
A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative （DCEN）, which can i...A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative （DCEN）, which can improve the crystallization process in the weld bead as a result of the electromagnetic force generated by pulse current. Digital signal processor （DSP） is used to realize the closed-loop control of the first inverter, variable polarity output of the second inverter and high-frequency pulse current superposition.展开更多
The transistor voltage regulators have been widely adopted in the brushless AC generators in aircraft. This paper researches the digital voltage regulator. The paper presents the hardware platform of the digital volta...The transistor voltage regulators have been widely adopted in the brushless AC generators in aircraft. This paper researches the digital voltage regulator. The paper presents the hardware platform of the digital voltage regulator, which is based on a DSP chip — TMS320C32. A novel fuzzy filter control structure is developed from normal fuzzy control strategy. And the fuzzy filter control algorithm is adopted in the hardware platform successfully. The computer simulation has been conducted. Some control parameters have been obtained through the simulation. The same parameters have been applied in the digital regulation experiments on a brushless AC generator. In the experiment, the digital voltage regulator results in good responses. From the experiment results, it can be seen that the new control algorithm is efficient for the digital voltage regulator.展开更多
An approach of position sensorless control for permanent magnet synchronous motor （ PMSM ） is put forward based on a sliding mode observer. The mathematical model of PMSM in a stationary αβ reference frame is adop...An approach of position sensorless control for permanent magnet synchronous motor （ PMSM ） is put forward based on a sliding mode observer. The mathematical model of PMSM in a stationary αβ reference frame is adopted, and the system is controlled by the digital signal processor （ DSP; TMS320LF2407 according to the control achieve closed loop operation of the motor, the stator theory of sliding mode observer. In order to magnetic field should be vertical with the rotor magnetic field and be synchronous with rotor rotating, so the position and speed of PMSM is estimated in real time and the estimated position is modified continuously. The simulation results indicate that the proposed observer has high precision is more robust to the parametric variation and load in estimation of PMSM position and speed, and torque disturbance.展开更多
A new design of vision based soccer robot using the type TMS320F240 of DSPs for MiroSot series is presented. The DSP used enables cost effective control of DC motor, and features fewer external components, lower syste...A new design of vision based soccer robot using the type TMS320F240 of DSPs for MiroSot series is presented. The DSP used enables cost effective control of DC motor, and features fewer external components, lower system cost and better performances than traditional microcontroller. The hardware architecture of robot is firstly presented in detail, and then the software design is briefly discussed. The control structure of decision making subsystem is illuminated also in this paper. The conclusion and prospect are given at last.展开更多
This paper presents an optimized implementation of the FDK algorithm on a single fixed-point TMS320C6455 digital signal processor （DSP）. Software pipelining and proper configuration of the data transfer enables a 25...This paper presents an optimized implementation of the FDK algorithm on a single fixed-point TMS320C6455 digital signal processor （DSP）. Software pipelining and proper configuration of the data transfer enables a 2563 volume to be reconstructed in about 42 seconds from 360 projections with very good accuracy. This implementation reveals the potential of modern high-performance DSPs in accelerating image reconstruction, especially when cost and power consumption are emphasized.展开更多
A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gatin...A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.展开更多
Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The ...Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The system adopts the overall design scheme of digital signal processor(DSP)and field-programmable gate array(FPGA).It consists of four modules:industrial control computer simulation software,mid-frequency signal generator,digital-to-analog(D/A)module and radio frequency(RF)module.In this paper,we test the dynamic performance of simulator using the dynamic scenes testing method,and the signal generated by the designed simulator is primarily validated.展开更多
We demonstrate the routing operation of optical packets by an optical packet switch consisting of an optical digital-to-analog conversion-type header processor, a wavelength converter using an electrically-tunable las...We demonstrate the routing operation of optical packets by an optical packet switch consisting of an optical digital-to-analog conversion-type header processor, a wavelength converter using an electrically-tunable laser, and an arrayed-waveguide grating router. A packet transfer by two-bit optical header was achieved for the first time.展开更多
文摘The automation process is a very important pillar for Industry 4.0.One of the first steps is the control of motors to improve production efficiency and generate energy savings.In mass production industries,techniques such as digital signal processing(DSP)systems are implemented to control motors.These systems are efficient but very expensive for certain applications.From this arises the need for a controller capable of handling AC and DC motors that improves efficiency and maintains low energy consumption.This project presents the design of an adaptive control system for brushless AC induction and DC motors,which is functional to any type of plant in the industry.The design was possible by implementing Matlab software and tools such as digital signal processor(DSP)and Simulink.Through an extensive investigation of the state of the art,three models needed to represent the control system have been specified.The first model for the AC motor,the second for the DC motor and the third for the DSP control;this is done in this way so that the probability of failure is lower.Subsequently,these models have been programmed in Simulink,integrating the three main models into one.In this way,the design of a controller for use in AC induction motors,specifically squirrel cage and brushless DC motors,has been achieved.The final model represents a response time of 0.25 seconds,which is optimal for this type of application,where response times of 2e-3 to 3 seconds are expected.
基金Supported by the National High Technology Research & Development Program of China (863 Program) (2002AA1Z1140).
文摘This paper presents a design method of ByPassing Unit(BPU) in 32-bit Digital Signal Processor(DSP)-MD32. MD32 is realized in 0,18μm technology, 1.8V and 200 MHz working clock. It focuses on the Reduced Instruction Set Computer(RISC) architecture and DSP computation capability thoroughly, extends DSP with various addressing modes in a customized DSP pipeline stage architecture. The paper also discusses the architecture and circuit design of bypassing logic to fit MD32 architecture. The parallel execution of BPU with instruction decode in architecture level is applied to reduce time delay. The optimization of circuit that serial select with priority is analyzed in detail, and the result shows that about half of time delay is reduced after this optimization. Examples show that BPU is useful for improving the DSP's performance.The forwarding logic in MD32 realizes 8 data channels feedback and meets the working clock limit.
基金supported by National Natural Science Foundation of China(No.50375054)China Postdoctoral Science Foundation (No.20060400745).
文摘A fuzzy logic intelligent control system of pulsed MAG welding inverter based on digital signal processor （DSP） is proposed to obtain the consistency of arc length in pulsed MAG welding. The proposed control system combines the merits of intelligent control with DSP digital control. The fuzzy logic intelligent control system designed is a typical two-input-single-output structure, and regards the error and the change in error of peak arc voltage as two inputs and the background time as single output. The fuzzy logic intelligent control system is realized in a look-up table （LUT） method by using MATLAB based fuzzy logic toolbox, and the implement of LUT method based on DSP is also discussed. The pulsed MAG welding experimental results demonstrate that the developed fuzzy logic intelligent control system based on DSP has strong arc length controlling ability to accomplish the stable pulsed MAG welding process and controls pulsed MAG welding inverter digitally and intelligently.
文摘The relativity of instructions of motor control digital signal processor (MCDSP) in the design is analyzed. A method for obtaining a minimum instruction set in plac e of the complete instruction set during generation of testing procedures is giv en in terms of the processor presentation matrix between micro-operators and in structions of MCDSP.
基金Supported by National Natural Science Foundation of China ( No50375054)China Postdoctoral Science Foundation ( No20060400745)
文摘A digital control of pulsed gas metal arc welding inverter was proposed. A control system consisting of analogue parts was replaced with a new digital control implemented in a TMS320LF2407A DSP chip. The design and constructional features of the whole digital control were presented. The resources of the DSP chip were efficiently utilized and the circuits are very concise, which can enhance the stability and reliability of welding inverter. Experimental results demonstrate that the developed digital control has the ability to accomplish the excellent pulsed gas metal arc welding process and the merits of the developed digital control are stable welding process, little spatter and perfect weld appearance.
文摘With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.
基金supported in part by the National Natural Science Foundation of China(No.61306027)
文摘The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.
基金the National Natural Science Foundation of China(No.60475018)~~
文摘This paper proposes a cochlear prosthetic system with an implanted digital signal processor （DSP）. This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limitation and suitable for future development. By optimizing the speech processing algorithm and the DSP hardware design, the implanted DSP manages to execute the continuous interleaved sampling （CIS） algorithm at a clock frequency of 3MHz and a power consumption of only 1.91mW. With an analytic power-transmission efficiency of the wireless inductive link （40%）, the power overhead caused by the implanted DSP is derived as 2.87roW,which is trivial when compared with the power consumption of existing cochlear prosthetic systems （tens of milliwatts）. With the DSP implanted,this new system can.be easily developed into a fully implanted cochlear prosthesis.
文摘The functions and characteristics of software radio are discussed. Using techniques and method of software radio, the concept and advantages of a new kind of radio fuze, software radio fuze, are analysed. Several kinds of hardware platform structures of the software radio fuze are studied and the key techniques are analysed. The software radio fuze will become the most promising radio fuze techniques in 21st century.
文摘The design and development of the traction controller for electric vehicle is introduced, which is based on the induction motor. This drive is developed by using a digital signal processor at low cost and carried out with the module design concept of both software and hardware. Nevertheless, a scheme of the sensorless direct torque control is based on the developed hardware, of which the feasibility is tested by a trial program. Additionally, both the interface function of the drive hardware and the feasibility of its software are proved to be good by the trail programs. A test motor can run about 18?r/min by a variable frequency program with the space vector pulse width modulation technology, of which the torque is visible pulsatile. In this presentation, based on the theoretical approach, the sensorless torque control is to be studied and applied to electric vehicles, of which the quick, smooth and stable torque response is emphasized because it quite benefits improving the drive performance of electric vehicles.
文摘A novel inverter power source is developed characterized with constant output current and unit power factor input. Digital signal processor （ DSP ） is used to realize power factor correction and control of back-stage inverter bridge of the arc welding inverter. The fore-stage adopts double closed loop proportion and integration （PI） rectifier technique and the back- stage adopts digital pulse width modulation （ PWM） technique. Simulated waves can be obtained in Matlab/Simulink and validated by experiments. Experiments of the prototype showed that the total harmonic distortion （THD） can be controlled within 10% and the power factor is approximate to 1.
文摘Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.
文摘A new type of variable polarity welding power modulated with high-frequency pulse current is developed. Series of high-frequency pulse current is superimposed on direct-current-electrode-negative （DCEN）, which can improve the crystallization process in the weld bead as a result of the electromagnetic force generated by pulse current. Digital signal processor （DSP） is used to realize the closed-loop control of the first inverter, variable polarity output of the second inverter and high-frequency pulse current superposition.
基金Pre-research subject of the 9-th 5 year plan for National Defenc
文摘The transistor voltage regulators have been widely adopted in the brushless AC generators in aircraft. This paper researches the digital voltage regulator. The paper presents the hardware platform of the digital voltage regulator, which is based on a DSP chip — TMS320C32. A novel fuzzy filter control structure is developed from normal fuzzy control strategy. And the fuzzy filter control algorithm is adopted in the hardware platform successfully. The computer simulation has been conducted. Some control parameters have been obtained through the simulation. The same parameters have been applied in the digital regulation experiments on a brushless AC generator. In the experiment, the digital voltage regulator results in good responses. From the experiment results, it can be seen that the new control algorithm is efficient for the digital voltage regulator.
文摘An approach of position sensorless control for permanent magnet synchronous motor （ PMSM ） is put forward based on a sliding mode observer. The mathematical model of PMSM in a stationary αβ reference frame is adopted, and the system is controlled by the digital signal processor （ DSP; TMS320LF2407 according to the control achieve closed loop operation of the motor, the stator theory of sliding mode observer. In order to magnetic field should be vertical with the rotor magnetic field and be synchronous with rotor rotating, so the position and speed of PMSM is estimated in real time and the estimated position is modified continuously. The simulation results indicate that the proposed observer has high precision is more robust to the parametric variation and load in estimation of PMSM position and speed, and torque disturbance.
文摘A new design of vision based soccer robot using the type TMS320F240 of DSPs for MiroSot series is presented. The DSP used enables cost effective control of DC motor, and features fewer external components, lower system cost and better performances than traditional microcontroller. The hardware architecture of robot is firstly presented in detail, and then the software design is briefly discussed. The control structure of decision making subsystem is illuminated also in this paper. The conclusion and prospect are given at last.
文摘This paper presents an optimized implementation of the FDK algorithm on a single fixed-point TMS320C6455 digital signal processor （DSP）. Software pipelining and proper configuration of the data transfer enables a 2563 volume to be reconstructed in about 42 seconds from 360 projections with very good accuracy. This implementation reveals the potential of modern high-performance DSPs in accelerating image reconstruction, especially when cost and power consumption are emphasized.
基金The Research Project of China Military Department (No6130325)
文摘A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.
基金Shanxi Provincial Science and Technology Research Fund(No.2012021013-6)
文摘Satellite signal simulator for global navigation satellite system(GNSS)can evaluate the accuracy of capturing,tracing and positioning of GNSS receiver.It has significant use-value in the military and civil fields.The system adopts the overall design scheme of digital signal processor(DSP)and field-programmable gate array(FPGA).It consists of four modules:industrial control computer simulation software,mid-frequency signal generator,digital-to-analog(D/A)module and radio frequency(RF)module.In this paper,we test the dynamic performance of simulator using the dynamic scenes testing method,and the signal generated by the designed simulator is primarily validated.
文摘We demonstrate the routing operation of optical packets by an optical packet switch consisting of an optical digital-to-analog conversion-type header processor, a wavelength converter using an electrically-tunable laser, and an arrayed-waveguide grating router. A packet transfer by two-bit optical header was achieved for the first time.
