This paper presents a 2GS/s 10bit CMOS digital-to-analog converter （DAC） that consists of two unit current-cell matrixes for 6MSBs and 4LSBs, respectively, trading off between the precision and size of the chip. Cur...This paper presents a 2GS/s 10bit CMOS digital-to-analog converter （DAC） that consists of two unit current-cell matrixes for 6MSBs and 4LSBs, respectively, trading off between the precision and size of the chip. Current mode logic （CML） is used to ensure high speed,and a double centro-symmetric current matrix is designed by the Q^2 random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2mm × 2.2mm of die area and consumes 790mW with a single 3.3V power supply.展开更多
The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improv...The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.展开更多
The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs,trading-off between the precision,speed,and size of the chip.In order to ensure the linearity of the DAC,a double...The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs,trading-off between the precision,speed,and size of the chip.In order to ensure the linearity of the DAC,a double Centro symmetric current matrix is designed by the Q2 random walk strategy.To achieve better dynamic performance,a latch is added in front of the current switch to change the input signal,such as its optimal cross-point and voltage level.For a 12bit resolution,the converter reaches an update rate of 300MHz.展开更多
A 16 bit stereo audio novel stability fifth-order ∑△ A/D converter that consists of switched capacitor ∑△ modulators, a decimation filter, and a bandgap circuit is proposed. A method for the stabilization of a hig...A 16 bit stereo audio novel stability fifth-order ∑△ A/D converter that consists of switched capacitor ∑△ modulators, a decimation filter, and a bandgap circuit is proposed. A method for the stabilization of a high order single stage ∑△ modulator is also proposed. A new multistage comb filter is used for the front end decimation filter. The ∑△ A/D converter achieves a peak SNR of 96dB and a dynamic range of 96dB. The ADC was implemented in 0. 5μm 5V CMOS technology. The chip die area occupies only 4. 1mm × 2.4mm and dissipates 90mW.展开更多
Based on the renormalization group theory, a hydraulic torque converter 3 D turbulent single flow passage model is constructed and boundary condition is determined for analyzing the influence of the fluid field chara...Based on the renormalization group theory, a hydraulic torque converter 3 D turbulent single flow passage model is constructed and boundary condition is determined for analyzing the influence of the fluid field characteristic and parameters on the macroscopic model. Numerical simulation of the single fluid path is processed by computational fluid dynamics and the calculated results approach to experimental data well, and especially in low transmission ratio the torque and head results are more close to experimental data than the calculated results of beam theory. This shows that the appropriate ternary analysis method and reasonable assumption of boundary condition may analyze the flow field more precisely and predict the performance of torque converter more accurately.展开更多
The pile-supported subgrade has been widely used in high-speed railway construction in China.To investigate the ground vibrations of such composite foundation subjected to moving loads induced by high-speed trains(HST...The pile-supported subgrade has been widely used in high-speed railway construction in China.To investigate the ground vibrations of such composite foundation subjected to moving loads induced by high-speed trains(HSTs),three-dimensional(3D)finite element method(FEM)models involving the pile,pile cap and cushion are established.Validation of the proposed model is conducted through comparison of model predictions with the field measurements.On this basis,ground vibrations generated by HSTs under different train speeds as well as the ground vibration attenuation with the distance away from the track centerline are investigated.In addition,the effects of piles and pile elastic modulus on ground vibrations are well studied.Results show that the pile-reinforcement of the subgrade could significantly contribute to the reduction of ground vibrations.In particular,the increase of elastic modulus of pile could lead to consistent reduction of ground vibrations.However,when the pile elastic modulus is beyond 10 GPa,this benefit of pile-reinforcement on vibration isolation can hardly be increased further.展开更多
This paper presents a design of single photon avalanche diode(SPAD)light detection and ranging(LiDAR)sensor with 128×128 pixels and 128 column-parallel time-to-analog-merged-analog-to-digital converts(TA-ADCs).Un...This paper presents a design of single photon avalanche diode(SPAD)light detection and ranging(LiDAR)sensor with 128×128 pixels and 128 column-parallel time-to-analog-merged-analog-to-digital converts(TA-ADCs).Unlike the conventional TAC-based SPAD LiDAR sensor,in which the TAC and ADC are separately implemented,we propose to merge the TAC and ADC by sharing their capacitors,thus avoiding the analog readout noise of TAC’s output buffer,improving the conversion rate,and reducing chip area.The reverse start-stop logic is employed to reduce the power of the TA-ADC.Fabricated in a 180 nm CMOS process,our prototype sensor exhibits a timing resolution of 25 ps,a DNL of+0.30/−0.77 LSB,an INL of+1.41/−2.20 LSB,and a total power consumption of 190 mW.A flash LiDAR system based on this sensor demonstrates the function of 2D/3D imaging with 128×128 resolution,25 kHz inter-frame rate,and sub-centimeter ranging precision.展开更多
A methodology for performance optimization of torque converters is put forward based on the one-dimensional (1D) flow model. It is found that the inaccuracy of 1D flow model for predicting hydraulic performance at the...A methodology for performance optimization of torque converters is put forward based on the one-dimensional (1D) flow model. It is found that the inaccuracy of 1D flow model for predicting hydraulic performance at the low speed ratio is mainly caused by the separation phenomenon at the stator cascade which is induced by large flow impinging at the pressure side of the stator blades. A semi-empirical separation model is presented and incorporated to the original 1D flow model. It is illustrated that the improved model is able to predict the circumferential velocity components accurately, which can be applied to performance optimization. Then, the Pareto front is obtained by using the genetic algorithm (GA) in order to inspect the coupled relationship among stalling impeller torque capacity, stalling torque ratio and efficiency. The efficiency is maximized on the premise that a target stalling impeller torque capacity and torque ratio are achieved. Finally, the optimized result is verified by the computational fluid dynamics(CFD) simulation, which indicates that the maximal efficiency is increased by 0.96%.展开更多
Digital to analog converters(DAC)play an important role as a bridge connecting the analog world and the digital world.With the rapid development of wireless communication,wideband digital radar,and other emerging tech...Digital to analog converters(DAC)play an important role as a bridge connecting the analog world and the digital world.With the rapid development of wireless communication,wideband digital radar,and other emerging technologies,better performing high-speed high-resolution DACs are required.In those applications,signal bandwidth and high-frequency linearity often limited by data converters are the bottleneck of the system.This article reviews the state-of-the-art technologies of high-speed and high-resolution DACs reported in recent years.Comparisons are made between different architectures,circuit implementations and calibration techniques along with the figure of merit(FoM)results.展开更多
The 3D clearance of a high-speed train(HST) is critical to ensure the safety of railway transportation. Many studies have been conducted on the inspection of the clearance profile in railway operation based on the vis...The 3D clearance of a high-speed train(HST) is critical to ensure the safety of railway transportation. Many studies have been conducted on the inspection of the clearance profile in railway operation based on the vision system, but few researchers have focused on the computation of the 3D clearance in the design phase of an HST. This paper summarizes the virtual 3D clearance computation of an HST based on model integration and the convex hull method. First, both the aerodynamic and kinetic analysis models of the HST are constructed. The two models are then integrated according to the corresponding relationship map, and an array of transformation matrixes of the HST is created to drive the designed model simulating the physical railway motion. Furthermore, the convex hull method is adopted to compute the 3D envelope of the moving train. Finally, the Hausdorff metric is involved in the measurement of the minimum clearance model and the 3D envelope model. In addition, the color map of the Hausdorff distance is established to verify that the designed shape of the HST meets the national standards. This paper provides an effective method to accurately calculate the 3D clearance for the shape design of an HST, which greatly reduces the development cost by minimizing the physical prototype that must be built.展开更多
A flexible flat torque converter was proposed to fulfill the requirement of miniaturization and power density maximization for automobiles.Constructed by two arcs joined by lines,the torus was designed directly from d...A flexible flat torque converter was proposed to fulfill the requirement of miniaturization and power density maximization for automobiles.Constructed by two arcs joined by lines,the torus was designed directly from design path.The influence of flatness on the performance of the torque converter was evaluated.The software CFX and standard k-ε model were adopted to simulate the internal flow fields of the torque converter under different flatness ratios.The results indicated that the performance of the torque converter got worse as the flatness declined,but the capacity of pump increased.The efficiency and the torque ratio dropped slightly as the flatness ratio decreased.So the torque converter could be squashed appropriately to get high power density without too much efficiency sacrifice.But when the flatness ratio was below 0.2,there was a significant drop in the efficiency.展开更多
The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mecha...The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mechanical converter with negative feedback mechanism(REMC-NFM)in order to replace the feedback mechanism of spiral groove and thus reduce cost of valve manufacturing.In order to rapidly and quantitative evaluate the driving and feedback performance of the REMC-NFM,an analytical model taking leakage flux,edge effect and permeability nonlinearity into account is formulated based on the equivalent magnetic circuit approach.Then the model is properly simplified in order to obtain the optimal pitch angle.FEM simulation is used to study the influence of crucial parameters on the performance of REMC-NFM.A prototype of REMC-NFM is designed and machined,and an exclusive experimental platform is built.The torque-angle characteristics,torque-displacement characteristics,and magnetic flux density in the working air gap with different excitation currents are measured.The experimental results are in good agreement with the analytical and FEM simulated results,which verifies the correctness of the analytical model.For torque-angle characteristics,the overall torque increases with both current and rotation angle,which reaches about 0.48 N·m with 1.5 A and 1.5°.While for torque-displacement characteristics,the overall torque increases with current yet decrease with armature displacement due to the negative feedback mechanism,which is about 0.16 N·m with 1.5 A and 0.8 mm.Besides,experimental results of conventional torque motor are compared with counterparts of REMC-NFM in order to validate the simplified model.The research indicates that the REMC-NFM can be potentially used as the electro-mechanical converter for 2D valves in civil servo areas.展开更多
A high-speed high-accuracy fully differenttial operational amplifier （op-amp） is realized based on no-Miller-capacitor feedforward （NMCF） compensation scheme. In order to achieve a good phase margin, the NMCF comp...A high-speed high-accuracy fully differenttial operational amplifier （op-amp） is realized based on no-Miller-capacitor feedforward （NMCF） compensation scheme. In order to achieve a good phase margin, the NMCF compensation scheme uses the positive phase shift of left-half-plane （LHP） zero caused by the feedforvvard path to counteract the negative phase shift of the non-dominant pole. Compared to traditional Miller compensation method, the op-amp obtains high gain and wide band synchronously without the pole-splitting effect while saves significant chip area due to the absence of the Miller capacitor. Simulated by the 0.35 μm CMOS RF technology, the result shows that the open-loop gain of the op-amp is 118 dB with the unity gain-bandwidth （UGBW） of 1 GHz, and the phase margin is 61°while the settling time is 5.8 ns when achieving 0.01% accuracy. The op-amp is especially suitable for the front-end sample/hold （S/H） cell and the multiplying D/A converter （MDAC） module of the high-speed high-resolution pipelined A/D converters （AVCs）.展开更多
This text has expounded the working principle of realizing A/D conversion that utilizes the timer within MCU and combinesthe technology of PWM. The design of hardware circuit, improved gradual approached trial arithme...This text has expounded the working principle of realizing A/D conversion that utilizes the timer within MCU and combinesthe technology of PWM. The design of hardware circuit, improved gradual approached trial arithmetic and relevant program design arediscussed in detail. And it has analyzed the resolution of A/D converter based on the technology of PWM, etc.展开更多
Local phase transition in transition metal dichalcogenides (TMDCs) by lithiumintercalation enables the fabrication of high-quality contact interfaces in twodimensional(2D) electronic devices. However, controlling the ...Local phase transition in transition metal dichalcogenides (TMDCs) by lithiumintercalation enables the fabrication of high-quality contact interfaces in twodimensional(2D) electronic devices. However, controlling the intercalation oflithium is hitherto challenging in vertically stacked van der Waalsheterostructures (vdWHs) due to the random diffusion of lithium ions in thehetero-interface, which hinders their application for contact engineering of 2DvdWHs devices. Herein, a strategy to restrict the lithium intercalation pathwayin vdWHs is developed by using surface-permeation assisted intercalationwhile sealing all edges, based on which a high-performance edge-contact MoS_(2)vdWHs floating-gate transistor is demonstrated. Our method avoids intercalationfrom edges that are prone to be random but intentionally promotes lithiumintercalation from the top surface. The derived MoS_(2) floating-gatetransistor exhibits improved interface quality and significantly reduced subthresholdswing (SS) from >600 to 100 mV dec^(–1). In addition, ultrafast program/erase performance together with well-distinguished 32 memory statesare demonstrated, making it a promising candidate for low-power artificialsynapses. The study on controlling the lithium intercalation pathways in 2DvdWHs offers a viable route toward high-performance 2D electronics for memoryand neuromorphic computing purposes.展开更多
文摘This paper presents a 2GS/s 10bit CMOS digital-to-analog converter （DAC） that consists of two unit current-cell matrixes for 6MSBs and 4LSBs, respectively, trading off between the precision and size of the chip. Current mode logic （CML） is used to ensure high speed,and a double centro-symmetric current matrix is designed by the Q^2 random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2mm × 2.2mm of die area and consumes 790mW with a single 3.3V power supply.
文摘The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.
文摘The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs,trading-off between the precision,speed,and size of the chip.In order to ensure the linearity of the DAC,a double Centro symmetric current matrix is designed by the Q2 random walk strategy.To achieve better dynamic performance,a latch is added in front of the current switch to change the input signal,such as its optimal cross-point and voltage level.For a 12bit resolution,the converter reaches an update rate of 300MHz.
文摘A 16 bit stereo audio novel stability fifth-order ∑△ A/D converter that consists of switched capacitor ∑△ modulators, a decimation filter, and a bandgap circuit is proposed. A method for the stabilization of a high order single stage ∑△ modulator is also proposed. A new multistage comb filter is used for the front end decimation filter. The ∑△ A/D converter achieves a peak SNR of 96dB and a dynamic range of 96dB. The ADC was implemented in 0. 5μm 5V CMOS technology. The chip die area occupies only 4. 1mm × 2.4mm and dissipates 90mW.
文摘Based on the renormalization group theory, a hydraulic torque converter 3 D turbulent single flow passage model is constructed and boundary condition is determined for analyzing the influence of the fluid field characteristic and parameters on the macroscopic model. Numerical simulation of the single fluid path is processed by computational fluid dynamics and the calculated results approach to experimental data well, and especially in low transmission ratio the torque and head results are more close to experimental data than the calculated results of beam theory. This shows that the appropriate ternary analysis method and reasonable assumption of boundary condition may analyze the flow field more precisely and predict the performance of torque converter more accurately.
基金Project(51978510)supported by the National Natural Science Foundation of China。
文摘The pile-supported subgrade has been widely used in high-speed railway construction in China.To investigate the ground vibrations of such composite foundation subjected to moving loads induced by high-speed trains(HSTs),three-dimensional(3D)finite element method(FEM)models involving the pile,pile cap and cushion are established.Validation of the proposed model is conducted through comparison of model predictions with the field measurements.On this basis,ground vibrations generated by HSTs under different train speeds as well as the ground vibration attenuation with the distance away from the track centerline are investigated.In addition,the effects of piles and pile elastic modulus on ground vibrations are well studied.Results show that the pile-reinforcement of the subgrade could significantly contribute to the reduction of ground vibrations.In particular,the increase of elastic modulus of pile could lead to consistent reduction of ground vibrations.However,when the pile elastic modulus is beyond 10 GPa,this benefit of pile-reinforcement on vibration isolation can hardly be increased further.
基金supported by National Science and Technology Major Project(Grant No.2021ZD0109801)in part by the Beijing Municipal Science and Technology Project(Grant No.Z221100007722028)in part by the National Natural Science Foundation of China(Grant No.62334008).
文摘This paper presents a design of single photon avalanche diode(SPAD)light detection and ranging(LiDAR)sensor with 128×128 pixels and 128 column-parallel time-to-analog-merged-analog-to-digital converts(TA-ADCs).Unlike the conventional TAC-based SPAD LiDAR sensor,in which the TAC and ADC are separately implemented,we propose to merge the TAC and ADC by sharing their capacitors,thus avoiding the analog readout noise of TAC’s output buffer,improving the conversion rate,and reducing chip area.The reverse start-stop logic is employed to reduce the power of the TA-ADC.Fabricated in a 180 nm CMOS process,our prototype sensor exhibits a timing resolution of 25 ps,a DNL of+0.30/−0.77 LSB,an INL of+1.41/−2.20 LSB,and a total power consumption of 190 mW.A flash LiDAR system based on this sensor demonstrates the function of 2D/3D imaging with 128×128 resolution,25 kHz inter-frame rate,and sub-centimeter ranging precision.
基金National Natural Science Foundation of China(No. 51175379)
文摘A methodology for performance optimization of torque converters is put forward based on the one-dimensional (1D) flow model. It is found that the inaccuracy of 1D flow model for predicting hydraulic performance at the low speed ratio is mainly caused by the separation phenomenon at the stator cascade which is induced by large flow impinging at the pressure side of the stator blades. A semi-empirical separation model is presented and incorporated to the original 1D flow model. It is illustrated that the improved model is able to predict the circumferential velocity components accurately, which can be applied to performance optimization. Then, the Pareto front is obtained by using the genetic algorithm (GA) in order to inspect the coupled relationship among stalling impeller torque capacity, stalling torque ratio and efficiency. The efficiency is maximized on the premise that a target stalling impeller torque capacity and torque ratio are achieved. Finally, the optimized result is verified by the computational fluid dynamics(CFD) simulation, which indicates that the maximal efficiency is increased by 0.96%.
文摘Digital to analog converters(DAC)play an important role as a bridge connecting the analog world and the digital world.With the rapid development of wireless communication,wideband digital radar,and other emerging technologies,better performing high-speed high-resolution DACs are required.In those applications,signal bandwidth and high-frequency linearity often limited by data converters are the bottleneck of the system.This article reviews the state-of-the-art technologies of high-speed and high-resolution DACs reported in recent years.Comparisons are made between different architectures,circuit implementations and calibration techniques along with the figure of merit(FoM)results.
基金Projects(51605495,51575541)supported by the National Natural Science Foundation of ChinaProject(2015JJ2168)supported by the Natural Science Foundation of Hunan Province of China
文摘The 3D clearance of a high-speed train(HST) is critical to ensure the safety of railway transportation. Many studies have been conducted on the inspection of the clearance profile in railway operation based on the vision system, but few researchers have focused on the computation of the 3D clearance in the design phase of an HST. This paper summarizes the virtual 3D clearance computation of an HST based on model integration and the convex hull method. First, both the aerodynamic and kinetic analysis models of the HST are constructed. The two models are then integrated according to the corresponding relationship map, and an array of transformation matrixes of the HST is created to drive the designed model simulating the physical railway motion. Furthermore, the convex hull method is adopted to compute the 3D envelope of the moving train. Finally, the Hausdorff metric is involved in the measurement of the minimum clearance model and the 3D envelope model. In addition, the color map of the Hausdorff distance is established to verify that the designed shape of the HST meets the national standards. This paper provides an effective method to accurately calculate the 3D clearance for the shape design of an HST, which greatly reduces the development cost by minimizing the physical prototype that must be built.
基金Supported by the National Natural Science Foundation of China (50905016)
文摘A flexible flat torque converter was proposed to fulfill the requirement of miniaturization and power density maximization for automobiles.Constructed by two arcs joined by lines,the torus was designed directly from design path.The influence of flatness on the performance of the torque converter was evaluated.The software CFX and standard k-ε model were adopted to simulate the internal flow fields of the torque converter under different flatness ratios.The results indicated that the performance of the torque converter got worse as the flatness declined,but the capacity of pump increased.The efficiency and the torque ratio dropped slightly as the flatness ratio decreased.So the torque converter could be squashed appropriately to get high power density without too much efficiency sacrifice.But when the flatness ratio was below 0.2,there was a significant drop in the efficiency.
基金National Natural Science Foundation of China(Grant Nos.51975524,51405443)National Key Research and Development Program of China(Grant No.2019YFB2005200).
文摘The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mechanical converter with negative feedback mechanism(REMC-NFM)in order to replace the feedback mechanism of spiral groove and thus reduce cost of valve manufacturing.In order to rapidly and quantitative evaluate the driving and feedback performance of the REMC-NFM,an analytical model taking leakage flux,edge effect and permeability nonlinearity into account is formulated based on the equivalent magnetic circuit approach.Then the model is properly simplified in order to obtain the optimal pitch angle.FEM simulation is used to study the influence of crucial parameters on the performance of REMC-NFM.A prototype of REMC-NFM is designed and machined,and an exclusive experimental platform is built.The torque-angle characteristics,torque-displacement characteristics,and magnetic flux density in the working air gap with different excitation currents are measured.The experimental results are in good agreement with the analytical and FEM simulated results,which verifies the correctness of the analytical model.For torque-angle characteristics,the overall torque increases with both current and rotation angle,which reaches about 0.48 N·m with 1.5 A and 1.5°.While for torque-displacement characteristics,the overall torque increases with current yet decrease with armature displacement due to the negative feedback mechanism,which is about 0.16 N·m with 1.5 A and 0.8 mm.Besides,experimental results of conventional torque motor are compared with counterparts of REMC-NFM in order to validate the simplified model.The research indicates that the REMC-NFM can be potentially used as the electro-mechanical converter for 2D valves in civil servo areas.
文摘A high-speed high-accuracy fully differenttial operational amplifier （op-amp） is realized based on no-Miller-capacitor feedforward （NMCF） compensation scheme. In order to achieve a good phase margin, the NMCF compensation scheme uses the positive phase shift of left-half-plane （LHP） zero caused by the feedforvvard path to counteract the negative phase shift of the non-dominant pole. Compared to traditional Miller compensation method, the op-amp obtains high gain and wide band synchronously without the pole-splitting effect while saves significant chip area due to the absence of the Miller capacitor. Simulated by the 0.35 μm CMOS RF technology, the result shows that the open-loop gain of the op-amp is 118 dB with the unity gain-bandwidth （UGBW） of 1 GHz, and the phase margin is 61°while the settling time is 5.8 ns when achieving 0.01% accuracy. The op-amp is especially suitable for the front-end sample/hold （S/H） cell and the multiplying D/A converter （MDAC） module of the high-speed high-resolution pipelined A/D converters （AVCs）.
文摘This text has expounded the working principle of realizing A/D conversion that utilizes the timer within MCU and combinesthe technology of PWM. The design of hardware circuit, improved gradual approached trial arithmetic and relevant program design arediscussed in detail. And it has analyzed the resolution of A/D converter based on the technology of PWM, etc.
基金National Key Research and Development Program of China,Grant/Award Number:2023YFB4502200National Natural Science Foundation of China,Grant/Award Numbers:52372149,U21A2069+2 种基金Innovation Project of Optics Valley Laboratory,Grant/Award Number:OVL2023PY007Guangdong HUST Industrial Technology Research Institute,Guangdong Provincial Key Laboratory of Manufacturing Equipment Digitization,Grant/Award Number:2023B1212060012Interdiciplinary Research Program of HUST,Grant/Award Number:2024JCYJ008。
文摘Local phase transition in transition metal dichalcogenides (TMDCs) by lithiumintercalation enables the fabrication of high-quality contact interfaces in twodimensional(2D) electronic devices. However, controlling the intercalation oflithium is hitherto challenging in vertically stacked van der Waalsheterostructures (vdWHs) due to the random diffusion of lithium ions in thehetero-interface, which hinders their application for contact engineering of 2DvdWHs devices. Herein, a strategy to restrict the lithium intercalation pathwayin vdWHs is developed by using surface-permeation assisted intercalationwhile sealing all edges, based on which a high-performance edge-contact MoS_(2)vdWHs floating-gate transistor is demonstrated. Our method avoids intercalationfrom edges that are prone to be random but intentionally promotes lithiumintercalation from the top surface. The derived MoS_(2) floating-gatetransistor exhibits improved interface quality and significantly reduced subthresholdswing (SS) from >600 to 100 mV dec^(–1). In addition, ultrafast program/erase performance together with well-distinguished 32 memory statesare demonstrated, making it a promising candidate for low-power artificialsynapses. The study on controlling the lithium intercalation pathways in 2DvdWHs offers a viable route toward high-performance 2D electronics for memoryand neuromorphic computing purposes.
