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A New Method to Investigate InGaAsP Single-Photon Avalanche Diodes Using a Digital Sampling Oscilloscope
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作者 刘伟 杨富华 吴孟 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第10期1711-1716,共6页
A near-infrared single-photon detection system is established by using pigtailed InGaAs/InP avalanche photodiodes. With a 50GHz digital sampling oscilloscope, the function and process of gated-mode (Geiger-mode) sin... A near-infrared single-photon detection system is established by using pigtailed InGaAs/InP avalanche photodiodes. With a 50GHz digital sampling oscilloscope, the function and process of gated-mode (Geiger-mode) single-photon detection are intuitionally demonstrated for the first time. The performance of the detector as a gated-mode single-photon counter at wavelengths of 1310 and 1550nm is investigated. At the operation temperature of 203K,a quantum efficiency of 52% with a dark count probability per gate of 2.4 × 10 ^-3 ,and a gate pulse repetition rate of 50kHz are obtained at 1550nm. The corresponding parameters are 43%, 8.5 × 10^-3 , and 200kHz at 238K. 展开更多
关键词 InGaAsP single-photon avalanche diode 50GHz digital sampling oscilloscope gated-mode
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A New CMOS Image Sensor with a High Fill Factor and the Dynamic Digital Double Sampling Technique
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作者 刘宇 王国裕 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第2期313-317,共5页
A single CMOS image sensor based on a 0.35μm process along with its design and implementation is introduced. The architecture of an active pixel sensor is used in the chip. The fill factor of a pixel cell can reach 4... A single CMOS image sensor based on a 0.35μm process along with its design and implementation is introduced. The architecture of an active pixel sensor is used in the chip. The fill factor of a pixel cell can reach 43%,higher than the traditional factor of 30%. Moreover, compared with the conventional method whose fixed pattern noise (FPN) is around 0.5%, a dynamic digital double sampling technique is developed, which possesses simpler circuit architecture and a better FPN suppression outcome. The CMOS image sensor chip is implemented in the 0.35μm mixed signal process of a Chartered by MPW. The experimental results show that the chip operates welt,with an FPN of about 0.17%. 展开更多
关键词 active pixel CMOS image sensor fill factor dynamic digital double sampling fixed pattern noise
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CCD signal acquisition and optimal digital denoise technology 被引量:1
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作者 Li Wencan Wen Yan +1 位作者 Wang Dong Yao Dalei 《High Technology Letters》 EI CAS 2021年第4期422-429,共8页
To reduce the charge-coupled device(CCD)readout noise and improve the detection ability under low illumination and dim targets,a new low-noise CCD signal processing technology-CCD digital denoiseis gradually being emp... To reduce the charge-coupled device(CCD)readout noise and improve the detection ability under low illumination and dim targets,a new low-noise CCD signal processing technology-CCD digital denoiseis gradually being employed in aerospace detection and other fields.In this study,the main readout noise of CCD detectors and its characteristics are analyzed.A CCD digital denoise system and an experimental platform are designed as well as established by using a PCIe data acquisition card.According to the characteristics of readout noise,some digital filters are analyzed and designed based on distributed kernel coefficient,and the optimal kernel coefficients are obtained through iteration.Then,CCD signal and filter model are established,and the optimal filter is designed to apply to the digital denoise system.Finally,according to the image data obtained from the system,the performance of the digital denoise system and digital filtering algorithm is evaluated and compared.At 500 kHz and 1 MHz CCD readout rates,the denoising performance of the optimal filter designed in the experiment is 16%-32%higher than that of the digital filter with kernel distribution coefficient,and 50%-60%higher than that of the traditional correlated double sampling technology. 展开更多
关键词 charge-coupled device(CCD) low noise reset noise digital correlated double sampling optimal filter
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Sampling Designs for Validating Digital Soil Maps: A Review 被引量:6
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作者 Asim BISWAS Yakun ZHANG 《Pedosphere》 SCIE CAS CSCD 2018年第1期1-15,共15页
Sampling design(SD) plays a crucial role in providing reliable input for digital soil mapping(DSM) and increasing its efficiency.Sampling design, with a predetermined sample size and consideration of budget and spatia... Sampling design(SD) plays a crucial role in providing reliable input for digital soil mapping(DSM) and increasing its efficiency.Sampling design, with a predetermined sample size and consideration of budget and spatial variability, is a selection procedure for identifying a set of sample locations spread over a geographical space or with a good feature space coverage. A good feature space coverage ensures accurate estimation of regression parameters, while spatial coverage contributes to effective spatial interpolation.First, we review several statistical and geometric SDs that mainly optimize the sampling pattern in a geographical space and illustrate the strengths and weaknesses of these SDs by considering spatial coverage, simplicity, accuracy, and efficiency. Furthermore, Latin hypercube sampling, which obtains a full representation of multivariate distribution in geographical space, is described in detail for its development, improvement, and application. In addition, we discuss the fuzzy k-means sampling, response surface sampling, and Kennard-Stone sampling, which optimize sampling patterns in a feature space. We then discuss some practical applications that are mainly addressed by the conditioned Latin hypercube sampling with the flexibility and feasibility of adding multiple optimization criteria. We also discuss different methods of validation, an important stage of DSM, and conclude that an independent dataset selected from the probability sampling is superior for its free model assumptions. For future work, we recommend: 1) exploring SDs with both good spatial coverage and feature space coverage; 2) uncovering the real impacts of an SD on the integral DSM procedure;and 3) testing the feasibility and contribution of SDs in three-dimensional(3 D) DSM with variability for multiple layers. 展开更多
关键词 calibration geographical space Latin hypercube sampling model-based design spatial coverage three-dimensional(3D) digital soil mapping
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DESIGN AND IMPLEMENTATION OF CMOS IMAGE SENSOR
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作者 Liu Yu Wang Guoyu 《Journal of Electronics(China)》 2007年第1期95-99,共5页
A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) ... A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) is used in the chip,which comprises a 256×256 pixel array together with column amplifiers,scan array circuits,series interface,control logic and Analog-Digital Converter (ADC). With the use of smart layout design,fill factor of pixel cell is 43%. Moreover,a new method of Dynamic Digital Double Sample (DDDS) which removes Fixed Pattern Noise (FPN) is used. The CMOS image sensor chip is implemented based on the 0.35μm process of chartered by Multi-Project Wafer (MPW). This chip performs well as expected. 展开更多
关键词 Complementary Metal Oxide Semiconductor (CMOS) Active Pixel Sensor (APS) Fill factor Dynamic digital Double Sample (DDDS) Fixed Pattern Noise (FPN)
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Research on Testing Technology of Relay Protection for Intelligent Substations 被引量:5
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作者 Zhan Rongrong Li Yanjun +3 位作者 Zhang Xiaoli Zhan Zhihua Yu Yue Chen Zhengguang 《Electricity》 2014年第5期38-43,共6页
Intelligent substations adopt various kinds of new technologies, including information sharing technology based on IEC61850, digital sampling technology, synchronization technology, and network transmission technology... Intelligent substations adopt various kinds of new technologies, including information sharing technology based on IEC61850, digital sampling technology, synchronization technology, and network transmission technology. Relay protection equipment faces all the challenges brought by the application of these new technologies. After analyzing the demand for test, the authors propose testing methods and technical requirements targeting the test items in great need, including ICD model file test, digital interface performance test, coordination performance test with merging unit and smart terminal, network pressure test. And the problems occurring during the tests are summarized. 展开更多
关键词 intelligent substation relay protection device test technology IEC61850 digital sampling and tripping
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