Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximati...Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximation and model order-reduction to the model, we derive a closed-form and time-domain waveform for the far-end crosstalk of a victim line under ramp input transition. For various interconnect coupling sizes, the proposed RLC coupling analytical model enables the estimation of the crosstalk voltage within 2.50% error compared with Hspice simulation in a 65nm CMOS process. This model can be used in computer-aided-design of nanometer SOCs.展开更多
RLC model is used to estimate the coupling noise between interconnect wires and make some analysis through the simulation result. Based on the analysis conclusion,some algorithms are developed to adjust the rou ting ...RLC model is used to estimate the coupling noise between interconnect wires and make some analysis through the simulation result. Based on the analysis conclusion,some algorithms are developed to adjust the rou ting result with crosstalk constraint.展开更多
文摘Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximation and model order-reduction to the model, we derive a closed-form and time-domain waveform for the far-end crosstalk of a victim line under ramp input transition. For various interconnect coupling sizes, the proposed RLC coupling analytical model enables the estimation of the crosstalk voltage within 2.50% error compared with Hspice simulation in a 65nm CMOS process. This model can be used in computer-aided-design of nanometer SOCs.
文摘RLC model is used to estimate the coupling noise between interconnect wires and make some analysis through the simulation result. Based on the analysis conclusion,some algorithms are developed to adjust the rou ting result with crosstalk constraint.
