Y99-61620-109 0001354基数为4和基数为8的除法器的功率延迟折衷=Pow-er-delay tradeoffs for radix-4 and radix-8 dividers[会,英]/Nannarelli,A.& Lang,T.//1998 IEEE Interna-tional Symposiurn on Low Power Electronics and D...Y99-61620-109 0001354基数为4和基数为8的除法器的功率延迟折衷=Pow-er-delay tradeoffs for radix-4 and radix-8 dividers[会,英]/Nannarelli,A.& Lang,T.//1998 IEEE Interna-tional Symposiurn on Low Power Electronics and De-sign.—109～111(AZ)展开更多
文摘IELDVD060:9286:29507-137 0604734 人工神经网络用低功率四象限CMOS模拟乘法器= Low power-four quadrant CMOS analog multiplier for ar- tificial neural networks[会,英]／Kapanoglu,B．／／Signal Processing and Communications Applications Conference, 2004.Proceedings of the IEEE 12th．-137-139(A)
文摘Y99-61620-109 0001354基数为4和基数为8的除法器的功率延迟折衷=Pow-er-delay tradeoffs for radix-4 and radix-8 dividers[会,英]/Nannarelli,A.& Lang,T.//1998 IEEE Interna-tional Symposiurn on Low Power Electronics and De-sign.—109～111(AZ)
