ERT(electrical resistance tomography) is effective method for visualization of multiphase flows,offering some advantages of rapid response and low cost,so as to explore the transient hydrodynamics.Aiming at this targe...ERT(electrical resistance tomography) is effective method for visualization of multiphase flows,offering some advantages of rapid response and low cost,so as to explore the transient hydrodynamics.Aiming at this target,a fully programmable and reconfigurable FPGA(field programmable gate array)-based Compact PCI(peripheral component interconnect) bus linked sixteen-channel ERT system has been presented.The data acquisition system is carefully designed with function modules of signal generator module;Compact PCI transmission module and data processing module(including data sampling,filtering and demodulating).The processing module incorporates a powerful FPGA with Compact PCI bus for communication,and the measurement process management is conducted in FPGA.Image reconstruction algorithms with different speed and accuracy are also coded for this system.The system has been demonstrated in real time(1400 frames per second for 50 kHz excitation) with signal-noise-ratio above 62 dB and repeatability error below 0.7%.Static experiments have been conducted and the images manifested good resolution relative to the actual object distribution.The parallel ERT system has provided alternative experimental platform for the multiphase flow measurements by the dynamic experiments in terms of concentration and velocity.展开更多
A parallel hybrid linear solver based on the Schur complement method has the potential to balance the robustness of direct solvers with the efficiency of preconditioned iterative solvers.However,when solving large-sca...A parallel hybrid linear solver based on the Schur complement method has the potential to balance the robustness of direct solvers with the efficiency of preconditioned iterative solvers.However,when solving large-scale highly-indefinite linear systems,this hybrid solver often suffers from either slow convergence or large memory requirements to solve the Schur complement systems.To overcome this challenge,we in this paper discuss techniques to preprocess the Schur complement systems in parallel. Numerical results of solving large-scale highly-indefinite linear systems from various applications demonstrate that these techniques improve the reliability and performance of the hybrid solver and enable efficient solutions of these linear systems on hundreds of processors,which was previously infeasible using existing state-of-the-art solvers.展开更多
A high-speed and high-resolution optical A/D quantizer is proposed.Its architecture is discussed.Bit circuits are built by using the phase modulators in parallel.Based on the different character of the half-wave volta...A high-speed and high-resolution optical A/D quantizer is proposed.Its architecture is discussed.Bit circuits are built by using the phase modulators in parallel.Based on the different character of the half-wave voltage for every phase modulator and the polarized bias design of incident light,the RF input signal is coled and transmitted in the form of optical digital signal.According to the principle of the architecture,the high-resolution quantizers with 8-bit and 12-bit,et al.are built,which operate at 100 GS/s.Their quantization noise is invariable almost with bit circuits increasing.The simulation result of 4-bit A/D quantizer is also given.展开更多
基金Supported by the National Natural Science Foundation of China (51176141)the Natural Science Foundation of Tianjin(11JCZDJC22500)
文摘ERT(electrical resistance tomography) is effective method for visualization of multiphase flows,offering some advantages of rapid response and low cost,so as to explore the transient hydrodynamics.Aiming at this target,a fully programmable and reconfigurable FPGA(field programmable gate array)-based Compact PCI(peripheral component interconnect) bus linked sixteen-channel ERT system has been presented.The data acquisition system is carefully designed with function modules of signal generator module;Compact PCI transmission module and data processing module(including data sampling,filtering and demodulating).The processing module incorporates a powerful FPGA with Compact PCI bus for communication,and the measurement process management is conducted in FPGA.Image reconstruction algorithms with different speed and accuracy are also coded for this system.The system has been demonstrated in real time(1400 frames per second for 50 kHz excitation) with signal-noise-ratio above 62 dB and repeatability error below 0.7%.Static experiments have been conducted and the images manifested good resolution relative to the actual object distribution.The parallel ERT system has provided alternative experimental platform for the multiphase flow measurements by the dynamic experiments in terms of concentration and velocity.
基金supported in part by the Director,Office of Science,Office of Advanced Scientific Computing Research,of the U.S.Department of Energy under Contract No.DE-AC02-05CH11231.
文摘A parallel hybrid linear solver based on the Schur complement method has the potential to balance the robustness of direct solvers with the efficiency of preconditioned iterative solvers.However,when solving large-scale highly-indefinite linear systems,this hybrid solver often suffers from either slow convergence or large memory requirements to solve the Schur complement systems.To overcome this challenge,we in this paper discuss techniques to preprocess the Schur complement systems in parallel. Numerical results of solving large-scale highly-indefinite linear systems from various applications demonstrate that these techniques improve the reliability and performance of the hybrid solver and enable efficient solutions of these linear systems on hundreds of processors,which was previously infeasible using existing state-of-the-art solvers.
基金Natural Science Foundation from Colleges and Universities of Jiangsu Province(04KJD140033)
文摘A high-speed and high-resolution optical A/D quantizer is proposed.Its architecture is discussed.Bit circuits are built by using the phase modulators in parallel.Based on the different character of the half-wave voltage for every phase modulator and the polarized bias design of incident light,the RF input signal is coled and transmitted in the form of optical digital signal.According to the principle of the architecture,the high-resolution quantizers with 8-bit and 12-bit,et al.are built,which operate at 100 GS/s.Their quantization noise is invariable almost with bit circuits increasing.The simulation result of 4-bit A/D quantizer is also given.
