A k-shortest path based algorithm considering layout density and signal integrity for good buffer candidatelocations is proposed in this paper. Theoretical results for computing the maximal distance betweenbuffers are...A k-shortest path based algorithm considering layout density and signal integrity for good buffer candidatelocations is proposed in this paper. Theoretical results for computing the maximal distance betweenbuffers are derived under the timing, noise and slew rate constraints. By modifying the traditional uniformwire segmenting strategy and considering the impact of tile size on density penalty function, this work proposesk-shortest path algorithm to find the buffer insertion candidate locations. The experiments show thatthe buffers inserted can significantly optimize the design density, alleviate signal degradation, save thenumber of buffers inserted and the overall run time.展开更多
基金Supported by the National Key Project of Scientific and Technical Supporting Programs (No. 2006BAK07B04).
文摘A k-shortest path based algorithm considering layout density and signal integrity for good buffer candidatelocations is proposed in this paper. Theoretical results for computing the maximal distance betweenbuffers are derived under the timing, noise and slew rate constraints. By modifying the traditional uniformwire segmenting strategy and considering the impact of tile size on density penalty function, this work proposesk-shortest path algorithm to find the buffer insertion candidate locations. The experiments show thatthe buffers inserted can significantly optimize the design density, alleviate signal degradation, save thenumber of buffers inserted and the overall run time.
