期刊文献+
共找到3篇文章
< 1 >
每页显示 20 50 100
高效容错可逆的汉明码编码和检测电路 被引量:4
1
作者 齐学梅 陈付龙 罗永龙 《量子电子学报》 CAS CSCD 北大核心 2013年第5期586-593,共8页
为了检验传输过程中数据的可靠性,设计了容错可逆的汉明码电路。提出了一种新型的可逆逻辑门(FVG),并且完成了FVG门等价的量子实现。利用FVG门和现有的容错可逆门,实现了汉明码编码电路和检测电路。以(7,4)汉明码设计为实例,... 为了检验传输过程中数据的可靠性,设计了容错可逆的汉明码电路。提出了一种新型的可逆逻辑门(FVG),并且完成了FVG门等价的量子实现。利用FVG门和现有的容错可逆门,实现了汉明码编码电路和检测电路。以(7,4)汉明码设计为实例,根据量子代价和延迟对其进行性能评估,结果证明该电路比现有电路的性能提高10%-20%,仿真实验结果显示,电路逻辑结构正确,性能可靠。 展开更多
关键词 量子信息 可逆逻辑 容错 汉明码 FVG门 编码和检测
下载PDF
Non-iterative image feature matching algorithm based on reference point correspondences 被引量:1
2
作者 张维中 张丽艳 +2 位作者 王小平 丁志安 周玲 《Journal of Southeast University(English Edition)》 EI CAS 2007年第2期190-195,共6页
Based on the coded and non-coded targets, the targets are extracted from the images according to their size, shape and intensity etc., and thus an improved method to identify the unique identity(D) of every coded ta... Based on the coded and non-coded targets, the targets are extracted from the images according to their size, shape and intensity etc., and thus an improved method to identify the unique identity(D) of every coded target is put forward and the non-coded and coded targets are classified. Moreover, the gray scale centroid algorithm is applied to obtain the subpixel location of both uncoded and coded targets. The initial matching of the uncoded target correspondences between an image pair is established according to similarity and compatibility, which are based on the ID correspondences of the coded targets. The outliers in the initial matching of the uncoded target are eliminated according to three rules to finally obtain the uncoded target correspondences. Practical examples show that the algorithm is rapid, robust and is of high precision and matching ratio. 展开更多
关键词 reference points detection coded and non-coded target SUBPIXEL gray scale centroid point correspondence
下载PDF
Optimization design of 24bit parallel MAC unit with saturation
3
作者 张萌 贾俊波 《Journal of Southeast University(English Edition)》 EI CAS 2006年第4期475-478,共4页
An efficient design method for a 24 × 24 bit +48 bit parallel saturating multiply-accumulate (MAC) unit is described. The augend in the MAC is merged as a partial product into Wallace tree array. The optimized... An efficient design method for a 24 × 24 bit +48 bit parallel saturating multiply-accumulate (MAC) unit is described. The augend in the MAC is merged as a partial product into Wallace tree array. The optimized saturation detection logic is proposed. The 679. 2 μm × 132. 5μm area size has been achieved in 0. 18 μm 1.8 V 1P6M CMOS technology by the full-custom circuit layout design. The simulation results show that the design way has significantly less area (about 23.52% reduction) and less delay than those of the common saturating MAC based on standard cell library. 展开更多
关键词 multiply-accumulate Booth encoding Wallace tree saturation detection layout design
下载PDF
上一页 1 下一页 到第
使用帮助 返回顶部