A general multiple-loop feedback approach for realization of Four-Terminal Floating Nullor RC(FTFN-RC) filter is presented.The proposed filter is constructed by multi-output FTFNs, capacitors and resistors.It can simu...A general multiple-loop feedback approach for realization of Four-Terminal Floating Nullor RC(FTFN-RC) filter is presented.The proposed filter is constructed by multi-output FTFNs, capacitors and resistors.It can simultaneously realize slow-pass, band-pass(if order is even number), and high-pass filter responses.With RC elements grounded and requiring no component matching con-straints, it is fully integrated conveniently.Simulations are performed for the fourth-order Butterworth filter to verify the validity of the circuit.展开更多
A new hybrid technique is presented, which combines the Mode Matching (MM) method with the Method of Lines (MoL) to analyze a coaxial fed monopole antenna. The monopole antenna is dealt with using the MoL, while the M...A new hybrid technique is presented, which combines the Mode Matching (MM) method with the Method of Lines (MoL) to analyze a coaxial fed monopole antenna. The monopole antenna is dealt with using the MoL, while the MM method is used to analyze the coaxial feed system. Then, the two sub-problems are combined by enforcing point matching at the common regional interfaces. The input impedance is computed and compared with the measured data reported in literature, and the excellent agreement is observed.展开更多
In this paper, by using the folding counter and linear feedback shift register, a new vector generator is proosed. The decisive testing patterns are generated by using the selected fold distance. Then the folding coun...In this paper, by using the folding counter and linear feedback shift register, a new vector generator is proosed. The decisive testing patterns are generated by using the selected fold distance. Then the folding counter seeds are encoded by the specialized seed encoder and clock gating, the ineffective patterns do not act upon the circuit under test, these testing patterns are designed to form a pseudo single input change set, so as to lead to prominent decreases in power consumption and redundant testing patterns generated by different seeds, without losing stuck-at fault coverage. Experimental results based on ISCAS＇85 benchmark circuits demonstrate the efficiency of the approach.展开更多
基金Supported by the Hunan Province Project of Education Department of Financial Aid (No.04C346)
文摘A general multiple-loop feedback approach for realization of Four-Terminal Floating Nullor RC(FTFN-RC) filter is presented.The proposed filter is constructed by multi-output FTFNs, capacitors and resistors.It can simultaneously realize slow-pass, band-pass(if order is even number), and high-pass filter responses.With RC elements grounded and requiring no component matching con-straints, it is fully integrated conveniently.Simulations are performed for the fourth-order Butterworth filter to verify the validity of the circuit.
文摘A new hybrid technique is presented, which combines the Mode Matching (MM) method with the Method of Lines (MoL) to analyze a coaxial fed monopole antenna. The monopole antenna is dealt with using the MoL, while the MM method is used to analyze the coaxial feed system. Then, the two sub-problems are combined by enforcing point matching at the common regional interfaces. The input impedance is computed and compared with the measured data reported in literature, and the excellent agreement is observed.
基金supported by General Equipments Ministry for the Fore-research of Military Electronic Devices Technology in the 11th Five Plan(No.51323030406)
文摘In this paper, by using the folding counter and linear feedback shift register, a new vector generator is proosed. The decisive testing patterns are generated by using the selected fold distance. Then the folding counter seeds are encoded by the specialized seed encoder and clock gating, the ineffective patterns do not act upon the circuit under test, these testing patterns are designed to form a pseudo single input change set, so as to lead to prominent decreases in power consumption and redundant testing patterns generated by different seeds, without losing stuck-at fault coverage. Experimental results based on ISCAS＇85 benchmark circuits demonstrate the efficiency of the approach.
