Simulating the total ionizing dose(TID)of an electrical system using transistor-level models can be difficult and expensive,particularly for digital-integrated circuits(ICs).In this study,a method for modeling TID eff...Simulating the total ionizing dose(TID)of an electrical system using transistor-level models can be difficult and expensive,particularly for digital-integrated circuits(ICs).In this study,a method for modeling TID effects in complementary metaloxide semiconductor(CMOS)digital ICs based on the input/output buffer information specification(IBIS)was proposed.The digital IC was first divided into three parts based on its internal structure:the input buffer,output buffer,and functional area.Each of these three parts was separately modeled.Using the IBIS model,the transistor V-I characteristic curves of the buffers were processed,and the physical parameters were extracted and modeled using VHDL-AMS.In the functional area,logic functions were modeled in VHDL according to the data sheet.A golden digital IC model was developed by combining the input buffer,output buffer,and functional area models.Furthermore,the golden ratio was reconstructed based on TID experimental data,enabling the assessment of TID effects on the threshold voltage,carrier mobility,and time series of the digital IC.TID experiments were conducted using a CMOS non-inverting multiplexer,NC7SZ157,and the results were compared with the simulation results,which showed that the relative errors were less than 2%at each dose point.This confirms the practicality and accuracy of the proposed modeling method.The TID effect model for digital ICs developed using this modeling technique includes both the logical function of the IC and changes in electrical properties and functional degradation impacted by TID,which has potential applications in the design of radiation-hardening tolerance in digital ICs.展开更多
电流型电路具有功耗低、速度快的特点,是当今集成电路研究的一个热点.文章基于阈算术代数系统,改进了非相交分解算法;设计了电流型互补金属氧化物半导体(complementary metal oxide semiconductor, CMOS)的异或门电路,并利用改进后的新...电流型电路具有功耗低、速度快的特点,是当今集成电路研究的一个热点.文章基于阈算术代数系统,改进了非相交分解算法;设计了电流型互补金属氧化物半导体(complementary metal oxide semiconductor, CMOS)的异或门电路,并利用改进后的新算法,将n变量函数分解成3变量函数,实现了任意n变量函数电路.模拟测试证明所设计的电路结构简单,且具有正确的逻辑功能.展开更多
基金This work was supported by the special fund of the State Key Laboratory of Intense Pulsed Radiation Simulation and Effect(No.SKLIPR2011).
文摘Simulating the total ionizing dose(TID)of an electrical system using transistor-level models can be difficult and expensive,particularly for digital-integrated circuits(ICs).In this study,a method for modeling TID effects in complementary metaloxide semiconductor(CMOS)digital ICs based on the input/output buffer information specification(IBIS)was proposed.The digital IC was first divided into three parts based on its internal structure:the input buffer,output buffer,and functional area.Each of these three parts was separately modeled.Using the IBIS model,the transistor V-I characteristic curves of the buffers were processed,and the physical parameters were extracted and modeled using VHDL-AMS.In the functional area,logic functions were modeled in VHDL according to the data sheet.A golden digital IC model was developed by combining the input buffer,output buffer,and functional area models.Furthermore,the golden ratio was reconstructed based on TID experimental data,enabling the assessment of TID effects on the threshold voltage,carrier mobility,and time series of the digital IC.TID experiments were conducted using a CMOS non-inverting multiplexer,NC7SZ157,and the results were compared with the simulation results,which showed that the relative errors were less than 2%at each dose point.This confirms the practicality and accuracy of the proposed modeling method.The TID effect model for digital ICs developed using this modeling technique includes both the logical function of the IC and changes in electrical properties and functional degradation impacted by TID,which has potential applications in the design of radiation-hardening tolerance in digital ICs.
文摘电流型电路具有功耗低、速度快的特点,是当今集成电路研究的一个热点.文章基于阈算术代数系统,改进了非相交分解算法;设计了电流型互补金属氧化物半导体(complementary metal oxide semiconductor, CMOS)的异或门电路,并利用改进后的新算法,将n变量函数分解成3变量函数,实现了任意n变量函数电路.模拟测试证明所设计的电路结构简单,且具有正确的逻辑功能.
