The alloy temperature dependence of Voffset and Rcontact is studied, and an optimal alloy temperature range for the best trade-off between Voffset and Rcontact, is given for thin base HBTs. In addition,the reason for ...The alloy temperature dependence of Voffset and Rcontact is studied, and an optimal alloy temperature range for the best trade-off between Voffset and Rcontact, is given for thin base HBTs. In addition,the reason for the high Voffset at high alloy temperature is interpreted using Schottky clamped theory. The lower Voffset of our U-shaped emitter HBT than that of traditional strip emitter HBTs is explained.展开更多
Based on a physical understanding of nonlinearity and mismatch, a novel offset-cancellation technique for low voltage CMOS differential amplifiers is proposed. The technique transfers the offset voltage from the outpu...Based on a physical understanding of nonlinearity and mismatch, a novel offset-cancellation technique for low voltage CMOS differential amplifiers is proposed. The technique transfers the offset voltage from the output to other parts of the differential amplifier and can greatly reduce the input-referred offset voltage without extra power consumption. A 1.8V CMOS differential amplifier is implemented in 0.18μm CMOS process using the proposed technique. The simulation results show that the technique could reduce the input-referred offset voltage of the amplifier by 40% with a 20% load transistor mismatch and a 10% input differential transistor mismatch. Moreover, the proposed technique consumes the least power and achieves the highest integration among various offset-cancellation techniques.展开更多
This paper presents a low power 8-bit 1 MS/s SAR ADC with 7.72-bit ENOB. Without an op-amp, an improved segmented capacitor DAC is proposed to reduce the capacitance and the chip area. A dynamic latch comparator with ...This paper presents a low power 8-bit 1 MS/s SAR ADC with 7.72-bit ENOB. Without an op-amp, an improved segmented capacitor DAC is proposed to reduce the capacitance and the chip area. A dynamic latch comparator with output offset voltage storage technology is used to improve the precision. Adding an extra positive feedback in the latch is to increase the speed. What is more, two pairs of CMOS switches are utilized to eliminate the kickback noise introduced by the latch. The proposed SAR ADC was fabricated in SMIC 0.18μm CMOS technology. The measured results show that this design achieves an SFDR of 61.8 dB and an ENOB of 7.72 bits, and it consumes 67.5μW with the FOM of 312 fJ/conversion-step at 1 MS/s sample under 1.8 V power supply.展开更多
A three op-amps instrumentation amplifier(I.A) is one of the most important segments in the electroencephalographic(EEG) acquisition system, which is used to suppress the interference of the common mode noise. However...A three op-amps instrumentation amplifier(I.A) is one of the most important segments in the electroencephalographic(EEG) acquisition system, which is used to suppress the interference of the common mode noise. However, electrode and op-amps offset voltages could saturate the I.A, so the ability of noise suppression for the I.A might be limited. To compensate for the electrode and op-amps offset voltages and improve the property of the I.A, the optical-isolated technology was used in the present study.This paper described the theory of DC suppression and employed the simulation software(i.e. Multisim10.0.) to demonstrate the constant<urrent source of the optical-isolated device comprised of general-purpose optocouplers.Using this technology we designed and tested an EEG acquisition system.During the test,a constant current was generated by the optocoupler(the MOTOROLA 4N35)when DC offset voltages from 0 to 15 mV were imposed on the input signal in the EEG acquisition system and the value of load resistance in the optical--isolated device was from 3 k to 15 kom.We also found that the IA with the gain of 857 could effectively reject a DC input rangeof±15mV.And An EEG signal is obtained by the EEG acquisition system,and a CMRR of 104.5 dB was achieved without trimmings.展开更多
文摘The alloy temperature dependence of Voffset and Rcontact is studied, and an optimal alloy temperature range for the best trade-off between Voffset and Rcontact, is given for thin base HBTs. In addition,the reason for the high Voffset at high alloy temperature is interpreted using Schottky clamped theory. The lower Voffset of our U-shaped emitter HBT than that of traditional strip emitter HBTs is explained.
文摘Based on a physical understanding of nonlinearity and mismatch, a novel offset-cancellation technique for low voltage CMOS differential amplifiers is proposed. The technique transfers the offset voltage from the output to other parts of the differential amplifier and can greatly reduce the input-referred offset voltage without extra power consumption. A 1.8V CMOS differential amplifier is implemented in 0.18μm CMOS process using the proposed technique. The simulation results show that the technique could reduce the input-referred offset voltage of the amplifier by 40% with a 20% load transistor mismatch and a 10% input differential transistor mismatch. Moreover, the proposed technique consumes the least power and achieves the highest integration among various offset-cancellation techniques.
基金supported by the National Natural Science Foundation of China(Nos.61161003,61264001,61166004)the Guangxi Key Laboratory of Precision Navigation Technology and Application Foundation(No.DH201501)
文摘This paper presents a low power 8-bit 1 MS/s SAR ADC with 7.72-bit ENOB. Without an op-amp, an improved segmented capacitor DAC is proposed to reduce the capacitance and the chip area. A dynamic latch comparator with output offset voltage storage technology is used to improve the precision. Adding an extra positive feedback in the latch is to increase the speed. What is more, two pairs of CMOS switches are utilized to eliminate the kickback noise introduced by the latch. The proposed SAR ADC was fabricated in SMIC 0.18μm CMOS technology. The measured results show that this design achieves an SFDR of 61.8 dB and an ENOB of 7.72 bits, and it consumes 67.5μW with the FOM of 312 fJ/conversion-step at 1 MS/s sample under 1.8 V power supply.
文摘A three op-amps instrumentation amplifier(I.A) is one of the most important segments in the electroencephalographic(EEG) acquisition system, which is used to suppress the interference of the common mode noise. However, electrode and op-amps offset voltages could saturate the I.A, so the ability of noise suppression for the I.A might be limited. To compensate for the electrode and op-amps offset voltages and improve the property of the I.A, the optical-isolated technology was used in the present study.This paper described the theory of DC suppression and employed the simulation software(i.e. Multisim10.0.) to demonstrate the constant<urrent source of the optical-isolated device comprised of general-purpose optocouplers.Using this technology we designed and tested an EEG acquisition system.During the test,a constant current was generated by the optocoupler(the MOTOROLA 4N35)when DC offset voltages from 0 to 15 mV were imposed on the input signal in the EEG acquisition system and the value of load resistance in the optical--isolated device was from 3 k to 15 kom.We also found that the IA with the gain of 857 could effectively reject a DC input rangeof±15mV.And An EEG signal is obtained by the EEG acquisition system,and a CMRR of 104.5 dB was achieved without trimmings.
