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Effect of the Transient Response in Si/Ge Parallelizing PN Junction 被引量:10
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作者 Weiqi HUANGt and Chaogang CHEN(Department of Physics, Guizhou Educational College, Guiyan 550003, China)Ergang CHEN(Department of Physics, Yunnan University, Kunming 650091, China)To whom correspondence should be addressed 《Journal of Materials Science & Technology》 SCIE EI CAS CSCD 1999年第4期383-383,共1页
There are some new results about photovoltaic transient response in the new effect. We suggest a theoretical model to explain the effect reasonably. The theoretical calculation results agree with that in experiments.
关键词 pn SI Ge Effect of the Transient Response in Si/Ge Parallelizing pn junction
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Comparison of time-related electrical properties of PN junctions and Schottky diodes for Zn O-based betavoltaic batteries 被引量:2
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作者 Xiao-Yi Li Jing-Bin Lu +4 位作者 Ren-Zhou Zheng Yu Wang Xu Xu Yu-Min Liu Rui He 《Nuclear Science and Techniques》 SCIE CAS CSCD 2020年第2期55-66,共12页
Schottky diodes and PN junctions were utilized as energy converting structures in ZnO-based betavoltaic batteries,in which 0.101121 Ci 63Ni was selected as the beta source.The time-related electrical properties were o... Schottky diodes and PN junctions were utilized as energy converting structures in ZnO-based betavoltaic batteries,in which 0.101121 Ci 63Ni was selected as the beta source.The time-related electrical properties were obtained using Monte Carlo simulations.For the n-type ZnO,the Pt/ZnO Schottky diode had the highest energy conversion efficiency,and the Ni/ZnO Schottky diode had the largest Isc.The overall electrical performance of PN junctions is better than that of Schottky diodes.The lifetimes of Pt/ZnO and Ni/ZnO are longer than for other Schottky devices,coming close to those of PN junctions.Considering that Schottky diodes are easier to fabricate and independent of p-type semiconductors,Pt/ZnO and Ni/ZnO diodes offer alternatives to PN-junction-based betavoltaic batteries. 展开更多
关键词 Beta voltaic effect Zinc oxide Time-related properties pn junction Schottky diode Monte Carlo simulation
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Origin of anomalous enhancement of the absorption coefficient in a PN junction
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作者 唐先胜 孙保安 +9 位作者 岳琛 李欣欣 张珺玚 邓震 杜春花 王文新 贾海强 江洋 汪卫华 陈弘 《Chinese Physics B》 SCIE EI CAS CSCD 2021年第9期547-551,共5页
The absorption coefficient is usually considered as a constant for certain materials at the given wavelength.However,recent experiments demonstrated that the absorption coefficient could be enhanced a lot by the PN ju... The absorption coefficient is usually considered as a constant for certain materials at the given wavelength.However,recent experiments demonstrated that the absorption coefficient could be enhanced a lot by the PN junction.The absorption coefficient varies with the thickness of the intrinsic layer in a PIN structure.Here,we interpret the anomalous absorption coefficient from the competition between recombination and drift for non-equilibrium carriers.Based on the Fokker-Planck theory,a non-equilibrium statistical model that describes the relationship between absorption coefficient and material thickness has been proposed.It could predict the experimental data well.Our results can give new ideas to design photoelectric devices. 展开更多
关键词 pn junction absorption coefficient non-equilibrium statistical model
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Fabrication and electrical properties of axial and radial GaAs nanowire pn junction diode arrays
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作者 李军帅 张霞 +5 位作者 颜鑫 陈雄 李亮 崔建功 黄永清 任晓敏 《Chinese Physics B》 SCIE EI CAS CSCD 2014年第12期555-558,共4页
We report on the fabrications and characterizations of axial and radial Ga As nanowire pn junction diode arrays.The nanowires are grown on n-doped Ga As(111)B substrates using the Au-catalyzed vapor–liquid–solid mec... We report on the fabrications and characterizations of axial and radial Ga As nanowire pn junction diode arrays.The nanowires are grown on n-doped Ga As(111)B substrates using the Au-catalyzed vapor–liquid–solid mechanism by metal–organic chemical vapor deposition(MOCVD). Diethyl–zinc and silane are used as p- and n-type dopant precursors,respectively. Both the axial and radial diodes exhibit diode-like J–V characteristics and have similar performances under forward bias. Under backward bias, the axial diode has a large leakage current, which is attributed to the bending of the pn junction interface induced by two doping mechanisms in Au-catalyzed nanowires. The low leakage current and high rectification ratio make the radial diode more promising in electrical and optoelectronic devices. 展开更多
关键词 二极管阵列 电气性能 纳米线 pn 砷化镓 径向 轴向 制造
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Two-dimensional complementary gate-programmable PN junctions for reconfigurable rectifier circuit
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作者 Zhe Sheng Yue Wang +6 位作者 Wennan Hu Haoran Sun Jianguo Dong Rui Yu David Wei Zhang Peng Zhou Zengxing Zhang 《Nano Research》 SCIE EI CSCD 2023年第1期1252-1258,共7页
The unique features of ambipolar two-dimensional materials open up a great opportunity to build gate-programmable devices for reconfigurable circuit applications,e.g.,PN junctions for rectifier circuits.However,curren... The unique features of ambipolar two-dimensional materials open up a great opportunity to build gate-programmable devices for reconfigurable circuit applications,e.g.,PN junctions for rectifier circuits.However,current-reported rectifier circuits usually consist of one gate-programmable PN junction as the rectifier and one resistor as the load,which are not conductive to voltage output and large-scale integration.Here we propose an approach of complementary gate-programmable PN junctions to assemble reconfigurable rectifier circuit,which include two symmetric back-to-back black phosphorus(BP)/hexagonal boron nitride(h-BN)/graphene heterostructured semi-gate field-effect transistors(FETs)and perform complementary NP and PN junction like complementary metal-oxide-semiconductor(CMOS)circuit.The investigation exhibits that the circuit can effectively reconfigure the circuit with/without rectifying ability,and can process alternating current(AC)signals with the frequency prior 1 KHz and reconfiguration speed up to 25μs.We also achieve the reconfigurable rectifier circuit memory via complementary semi-floating gate FETs configuration.The complementary configuration here should be of low output impedance and low static power consumption,being beneficial for effective voltage output and large-scale integration. 展开更多
关键词 two-dimensional(2D)material pn junction rectifier circuit complementary configuration
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一种基于传输线理论的pn结二极管小信号模型
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作者 李翔 刘军 《半导体技术》 CAS 北大核心 2024年第3期218-225,共8页
为了精确表征毫米波频段pn结二极管的特性,提出了一种基于传输线理论的pn结二极管小信号模型。该模型包括表征pn结的本征部分和寄生部分。以量化的pn结耗尽区串联电阻作为中间项,通过非线性传输线理论近似方法,推导出全新的pn结二极管... 为了精确表征毫米波频段pn结二极管的特性,提出了一种基于传输线理论的pn结二极管小信号模型。该模型包括表征pn结的本征部分和寄生部分。以量化的pn结耗尽区串联电阻作为中间项,通过非线性传输线理论近似方法,推导出全新的pn结二极管小信号模型的拓扑结构。通过导纳参数和阻抗参数的参数解析提取方法,提取等效电路中各元件参数值。使用某磷化铟(InP)工艺线加工所得2×3μm、8×8μm、4×16μm二极管的散射参数数据进行验证。结果表明,在1~110 GHz频率范围内,不同偏压的模型仿真结果与测试结果均吻合较好,同时也能表明模型在毫米波频段内有良好的适用性。 展开更多
关键词 毫米波频段 pn 耗尽区串联电阻 传输线理论 参数解析提取
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Electrical nonlinearity in silicon modulators based on reversed PN junctions
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作者 SHENG YU TAO CHU 《Photonics Research》 SCIE EI 2017年第2期124-128,共5页
The electrical nonlinearity of silicon modulators based on reversed PN junctions was found to severely limit the linearity of the modulators.This effect,however,was inadvertently neglected in previous studies.Consider... The electrical nonlinearity of silicon modulators based on reversed PN junctions was found to severely limit the linearity of the modulators.This effect,however,was inadvertently neglected in previous studies.Considering the electrical nonlinearity in simulation,a 32.2 dB degradation in the CDR3(i.e.,the suppression ratio between the fundamental signal and intermodulation distortion)of the modulator was observed at a modulation speed of 12 GHz,and the spurious free dynamic range was simultaneously degraded by 17.4 dB.It was also found that the linearity of the silicon modulator could be improved by reducing the series resistance of the PN junction.The frequency dependence of the linearity due to the electrical nonlinearity was also investigated. 展开更多
关键词 pn Electrical nonlinearity in silicon modulators based on reversed pn junctions SFDR CDR MZM IMD EN
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Electromechanical Fields Near a Circular PN Junction Between Two Piezoelectric Semiconductors 被引量:5
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作者 Yixun Luo Ruoran Cheng +2 位作者 Chunli Zhang Weiqiu Chen Jiashi Yang 《Acta Mechanica Solida Sinica》 SCIE EI CSCD 2018年第2期127-140,共14页
We study electromechanical fields near the interface between a circular piezoelectric semiconductor cylinder and another piezoelectric semiconductor in which it is embedded.The cylinder is p-doped. The surrounding mat... We study electromechanical fields near the interface between a circular piezoelectric semiconductor cylinder and another piezoelectric semiconductor in which it is embedded.The cylinder is p-doped. The surrounding material is n-doped. The phenomenological theory of piezoelectric semiconductors consisting of the equations of piezoelectricity and the conservation of charge for holes and electrons is used. The theory is linearized for small carrier concentration perturbations. An analytical solution is obtained, showing the formation of a PN junction near the interface. Various electromechanical fields associated with the junction are calculated. The effects of a few physical parameters are examined. 展开更多
关键词 半导体 压电 机电 连接 圆形 物理参数 现象学 线性化
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集成PN结防护结构的薄膜换能芯片
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作者 李慧 骆建军 +4 位作者 任炜 冯春阳 褚恩义 陈建华 李蛟 《含能材料》 EI CAS CSCD 北大核心 2023年第3期222-228,共7页
研究设计了一种平面纵向集成PN结(半导体的空间电荷区)结构二极管的薄膜换能元芯片,并制作了3Ω和4Ω2种桥区电阻,每种电阻制备1.0 mm×1.0 mm、1.5 mm×1.5 mm、2.0 mm×4.0 mm 3种芯片尺寸,每种尺寸设计8,18,28,34 V 4种... 研究设计了一种平面纵向集成PN结(半导体的空间电荷区)结构二极管的薄膜换能元芯片,并制作了3Ω和4Ω2种桥区电阻,每种电阻制备1.0 mm×1.0 mm、1.5 mm×1.5 mm、2.0 mm×4.0 mm 3种芯片尺寸,每种尺寸设计8,18,28,34 V 4种击穿电压的集成芯片样品,其中1.0 mm芯片对应4种击穿电压的芯片,1.5 mm、2.0 mm芯片对应34 V击穿电压进行静电对比试验。为研究集成防护结构对换能元的爆发性能的影响,对3Ω的1.0 mm集成芯片进行了发火试验测试。结果表明集成薄膜芯片尺寸越大,抗静电能力增强;芯片桥区电阻越大,越容易受到静电干扰损伤,其静电防护性能达500 pF/500Ω/25 kV。PN结结构的击穿电压越小,其旁路电流的能力越大,对换能元爆发性能的影响越大,击穿电压越大,对换能元的静电防护作用越小。对于33μF/16 V作用条件的火工品,选择18 V击穿电压的集成芯片说明集成薄膜芯片应用中需要根据换能元的工作电压选用合适的击穿电压,以保证集成芯片既可以防护静电干扰,不影响产品的正常作用。 展开更多
关键词 微机电系统 pn 薄膜换能元 抗静电 发火
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Formation of single crystalline tellurium supersaturated silicon pn junctions by ion implantation followed by pulsed laser melting
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作者 王熙元 黄永光 +3 位作者 刘德伟 朱小宁 崔晓 朱洪亮 《Journal of Semiconductors》 EI CAS CSCD 2013年第6期16-20,共5页
Pn junctions based on single crystalline tellurium supersaturated silicon were formed by ion implantation followed by pulsed laser melting(PLM).P type silicon wafers were implanted with 245 keV 126Te+ to a dose of 2... Pn junctions based on single crystalline tellurium supersaturated silicon were formed by ion implantation followed by pulsed laser melting(PLM).P type silicon wafers were implanted with 245 keV 126Te+ to a dose of 2×1015 ions/cm2,after a PLM process(248 nm,laser fluence of 0.30 and 0.35 J/cm2,1-5 pulses,duration 30 ns),an n+ type single crystalline tellurium supersaturated silicon layer with high carrier density(highest concentration 4.10×1019 cm-3,three orders of magnitude larger than the solid solution limit) was formed,it shows high broadband optical absorption from 400 to 2500 nm.Current-voltage measurements were performed on these diodes under dark and one standard sun(AM 1.5),and good rectification characteristics were observed.For present results,the samples with 4-5 pulses PLM are best. 展开更多
关键词 离子注入 激光熔化 过饱和 pn 脉冲 单晶 硅片
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Study on Photocapacitance in PN Junction of High Resistivity P-type Silicon
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作者 CHEN Jie (Hangzhou Institute of Appl. Eng. Tech.,Hangzhou 310012,CHN) 《Semiconductor Photonics and Technology》 CAS 1998年第3期193-195,共3页
1IntroductionWiththedevelopmentofpurificationandgrowthofsiliconmaterial,especialy,thedevelopmentofhighlypure... 1IntroductionWiththedevelopmentofpurificationandgrowthofsiliconmaterial,especialy,thedevelopmentofhighlypureSiH4,thepurityofh... 展开更多
关键词 光电容量 发光二极管 pn 半导体光电设备 半导体硅
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双极型晶体管PN结电容温度特性研究
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作者 温术来 张磊 +1 位作者 于树永 卢江 《铁路通信信号工程技术》 2023年第8期101-106,共6页
以轨道电路系统中常用某型号双极型晶体管为对象,结合轨道电路系统信号特点,研究环境温度对其P N结电容的影响规律。研究发现,该款晶体管基极-发射极与基极-集电极P N结电容变化规律基本一致,即随外加电场增加P N结,电容值也随之增加,... 以轨道电路系统中常用某型号双极型晶体管为对象,结合轨道电路系统信号特点,研究环境温度对其P N结电容的影响规律。研究发现,该款晶体管基极-发射极与基极-集电极P N结电容变化规律基本一致,即随外加电场增加P N结,电容值也随之增加,且由势垒电容逐渐向扩散电容转变。当外加电场低于内建电场时,PN结电容值随环境温度升高而增加;当外加电场高于内建电场时,PN结电容值则随环境温度升高而逐渐减小。本研究对晶体管选型、维护及故障失效分析具有实际工程价值。 展开更多
关键词 双极型晶体管 结电容 pn
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Design,preparation,and characterization of a novel ZnO/CuO/Al energetic diode with dual functionality:Logic and destruction
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作者 Jialu Yang Jiaheng Hu +3 位作者 Yinghua Ye Jianbing Xu Yan Hu Ruiqi Shen 《Defence Technology(防务技术)》 SCIE EI CAS CSCD 2024年第4期57-68,共12页
Self-destructing chips have promising applications for securing data.This paper proposes a new concept of energetic diodes for the first time,which can be used for self-destructive chips.A simple two-step electrochemi... Self-destructing chips have promising applications for securing data.This paper proposes a new concept of energetic diodes for the first time,which can be used for self-destructive chips.A simple two-step electrochemical deposition method is used to prepare ZnO/CuO/Al energetic diode,in which N-type ZnO and P-type CuO are constricted to a PN junction.This paper comprehensively discusses the material properties,morphology,semiconductor characteristics,and exploding performances of the energetic diode.Experimental results show that the energetic diode has typical rectification with a turn-on voltage of about 1.78 V and a reverse leakage current of about 3×10^(-4)A.When a constant voltage of 70 V loads to the energetic diode in the forward direction for about 0.14 s or 55 V loads in the reverse direction for about 0.17 s,the loaded power can excite the energetic diode exploding and the current rises to about100 A.Due to the unique performance of the energetic diode,it has a double function of rectification and explosion.The energetic diode can be used as a logic element in the normal chip to complete the regular operation,and it can release energy to destroy the chip accurately. 展开更多
关键词 Energetic diode ZnO—CuO—Al thermite ZnO/CuO pn junction Electrical explosion performance Self-destructing chips
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采用半导体激光器自身pn结特性测温的半导体激光器恒温控制 被引量:14
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作者 林志琦 张洋 +1 位作者 郎永辉 尹福昌 《发光学报》 EI CAS CSCD 北大核心 2009年第2期223-227,共5页
温度对半导体激光器的发射波长有很大的影响,而很多应用都要求半导体激光器的发射波长是稳定的。针对使用测温元件作为温度传感器进行半导体激光器恒温控制中存在的温度误差,提出了以半导体激光器自身pn结作为温度检测元件进行半导体激... 温度对半导体激光器的发射波长有很大的影响,而很多应用都要求半导体激光器的发射波长是稳定的。针对使用测温元件作为温度传感器进行半导体激光器恒温控制中存在的温度误差,提出了以半导体激光器自身pn结作为温度检测元件进行半导体激光器恒温控制的方法,设计了半导体制冷器的驱动电路。该方法利用pn结的温度敏感特性,首先通过实际测量标定pn结的温度与其两端压降的对应关系,然后通过测量压降得出相应的实际温度。实验结果表明,采用该方法消除了使用温度传感器进行半导体激光器恒温控制中温度梯度造成的恒温误差,提高了测量速度,显著减小了超调量,消除了静差和波动。 展开更多
关键词 激光二极管 温度检测 pn结测温 半导体制冷
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ZnSe pn二极管蓝绿色电致发光 被引量:4
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作者 张吉英 申德振 +4 位作者 杨宝均 范希武 郑著宏 吕有明 关郑平 《发光学报》 EI CAS CSCD 北大核心 1997年第2期110-114,共5页
用常压MOCVD方法制备了ZnSepn结构.由电子束感生电流像表明pn结的存在;用发光和I-V等方法研究了二极管的特性;
关键词 硒化锌 pn 二极管 ZnCdSe-ZnSe 蓝绿色
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PN结型器件在氚钛片辐照下电输出性能 被引量:5
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作者 王关全 杨玉青 +4 位作者 张华明 胡睿 魏洪源 熊晓玲 高晖 《核技术》 CAS CSCD 北大核心 2009年第8期584-587,共4页
用多片具有不同金属钛膜厚度和充氚量的氚钛片对两种单晶硅基PN结型器件进行了辐照,在线测量了它们的电输出性能并进行了定性分析。结果表明,在本文所采用的钛膜厚度和氚量级下,器件输出短路电流等随充氚量增加而小幅增大,但不成正比关... 用多片具有不同金属钛膜厚度和充氚量的氚钛片对两种单晶硅基PN结型器件进行了辐照,在线测量了它们的电输出性能并进行了定性分析。结果表明,在本文所采用的钛膜厚度和氚量级下,器件输出短路电流等随充氚量增加而小幅增大,但不成正比关系;器件的掺杂浓度、结深等结构参数对器件电输出性能影响较大。 展开更多
关键词 pn 氚钛片 辐射伏特效应同位素电池 电输出性能
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低能离子束轰击碲镉汞制备pn结电学特性的研究 被引量:3
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作者 陆慧庆 赵军 +2 位作者 李向阳 周咏东 方家熊 《红外与毫米波学报》 SCIE EI CAS CSCD 北大核心 1998年第1期21-24,共4页
用低能离子束轰击工艺制备了3~5μm及8~10μm碲镉汞pn结,研究了它们的电流-电压及电容-电压特性,发现该pn结为缓变结,与通常认为的关于低能离子束轰击p型碲镉汞造成表面转型的机制主要是汞扩散的假说相符合.
关键词 离子束轰击 碲镉汞 pn 电学特性 红外材料
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飞秒激光对P型碲镉汞打孔的形貌和PN结特性研究 被引量:4
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作者 周松敏 查访星 +4 位作者 郭青天 殷菲 李茂森 马洪良 张波 《红外与毫米波学报》 SCIE EI CAS CSCD 北大核心 2010年第5期337-341,共5页
激光束诱导电流(LBIC)检测实验表明,飞秒激光刻蚀P型碲镉汞形成的孔洞结构具有PN结特性.实验研究了激光刻蚀功率、激光聚焦透镜数值孔径等参数对刻蚀孔形貌的影响,发现在较低的激光功率范围内,孔径与激光功率基本呈线性关系.刻蚀孔反型... 激光束诱导电流(LBIC)检测实验表明,飞秒激光刻蚀P型碲镉汞形成的孔洞结构具有PN结特性.实验研究了激光刻蚀功率、激光聚焦透镜数值孔径等参数对刻蚀孔形貌的影响,发现在较低的激光功率范围内,孔径与激光功率基本呈线性关系.刻蚀孔反型层的厚度也与激光功率基本呈线性关系,但不同激光功率刻蚀所形成孔结构的LBIC信号强度的改变不大.另外,还研究了刻蚀激光在材料中聚焦深度对刻蚀孔LBIC信号的影响,发现该因素的影响并不明显. 展开更多
关键词 碲镉汞 pn 激光束诱导电流 飞秒激光打孔
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PN结对交流信号相位的影响 被引量:5
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作者 茅卫红 侯清润 +3 位作者 陈宜保 张慧云 陈宏 何元金 《物理实验》 北大核心 2003年第8期6-8,12,共4页
交流小信号被 PN结和电容分压 ,且电容值远远大于 PN结电容值时 ,大电容两端的电压是很小的交变电压 ,该信号的相位与 PN结的内阻 (正向 )有关 .把 PN结当做一个电容和一个电阻并联 。
关键词 pn 交流信号 相位 电容分压 电容值 交变电压 半导体
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新颖的衬底pn结隔离型硅射频集成电感(英文) 被引量:5
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作者 刘畅 陈学良 严金龙 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2001年第12期1486-1489,共4页
提出了一种新的减小硅集成电感衬底损耗的方法 .这种方法是直接在硅衬底形成间隔的 pn结隔离以阻止螺旋电感诱导的涡流 .衬底 pn结间隔能用标准硅工艺实现而不需另外的工艺 .本文设计和制作了硅集成电路 ,测量了硅集成电感的 S参数并且... 提出了一种新的减小硅集成电感衬底损耗的方法 .这种方法是直接在硅衬底形成间隔的 pn结隔离以阻止螺旋电感诱导的涡流 .衬底 pn结间隔能用标准硅工艺实现而不需另外的工艺 .本文设计和制作了硅集成电路 ,测量了硅集成电感的 S参数并且从测量数据提取了电感的参数 .研究了衬底结隔离对硅集成电感的品质因素 Q的影响 .结果表明一定深度的衬底结隔离能够取得很好的效果 .在 3GHz,衬底 pn结隔离能使电感的品质因素 Q值提高4 0 % . 展开更多
关键词 硅集成电感 品质因素 pn结隔离 衬底
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