A square graphene single electron transistor （SET） was defined with two side gates, and its transport was studied at low temperature at T = 2 K. At zero magnetic field, Coulomb blockade oscillations were clearly obs...A square graphene single electron transistor （SET） was defined with two side gates, and its transport was studied at low temperature at T = 2 K. At zero magnetic field, Coulomb blockade oscillations were clearly observed near the Dirac point of this device. At high magnetic field, in the quantum Hall regime, we observed ballistic tunneling of the carders through the graphene SET, contrary to the Coulomb blockades observed while approaching the vicinity of the Dirac point.展开更多
Si based single electron transistor (SET) is fabricated successfully on p type SIMOX substrate,based on electron beam (EB) lithography,reactive ion etching (RIE) and thermal oxidation.In particular,using thermal oxi...Si based single electron transistor (SET) is fabricated successfully on p type SIMOX substrate,based on electron beam (EB) lithography,reactive ion etching (RIE) and thermal oxidation.In particular,using thermal oxidation and etching off the oxide layer,a one dimensional Si quantum wire can be converted into several quantum dots inside quantum wire in connection with the source and drain regions.The differential conductance (d I ds /d V ds ) oscillations and the Coulomb staircases in the source drain current ( I ds ) are shown clearly dependent on the source drain voltage at 5 3K.The I ds V gs (gate voltage) oscillations are observed from the I ds V gs characteristics as a function of V gs at different temperatures and various values of V ds .For a SET whose total capacitance is about 9 16aF,the I ds V gs oscillations can be observed at 77K.展开更多
Based on the orthodox theory,a model of a single electron transistor （SET） of metallic tunneling junctions is built using the master equation method. Several parameters of the device, such as capacitance, resistance...Based on the orthodox theory,a model of a single electron transistor （SET） of metallic tunneling junctions is built using the master equation method. Several parameters of the device, such as capacitance, resistance and temperature,are input into the model and thus the I-V curves are attained. These curves are consistent with those from other experiments; therefore, the model is verified. However, there still exists a difference between simulated results and experimental results,mainly comes from the stationary case of the master equation. In other words, precision of simulated results would be increased if the transient case of the master equation is considered. Moreover, the current increases exponentially at higher drain voltages, which is due to the fact that the barrier suppression is caused by the image charge potential.展开更多
基金supported by the National Natural Science Foundation of China (Grant No. 10874220)the Main Direction Program of Knowledge Innovation of Chinese Academy of Sciences (Grant No. KJCX2-YW- W30)the Natinal Basic Research Program of China from the MOST (Grant No. 2011CB932704)
文摘A square graphene single electron transistor （SET） was defined with two side gates, and its transport was studied at low temperature at T = 2 K. At zero magnetic field, Coulomb blockade oscillations were clearly observed near the Dirac point of this device. At high magnetic field, in the quantum Hall regime, we observed ballistic tunneling of the carders through the graphene SET, contrary to the Coulomb blockades observed while approaching the vicinity of the Dirac point.
文摘Si based single electron transistor (SET) is fabricated successfully on p type SIMOX substrate,based on electron beam (EB) lithography,reactive ion etching (RIE) and thermal oxidation.In particular,using thermal oxidation and etching off the oxide layer,a one dimensional Si quantum wire can be converted into several quantum dots inside quantum wire in connection with the source and drain regions.The differential conductance (d I ds /d V ds ) oscillations and the Coulomb staircases in the source drain current ( I ds ) are shown clearly dependent on the source drain voltage at 5 3K.The I ds V gs (gate voltage) oscillations are observed from the I ds V gs characteristics as a function of V gs at different temperatures and various values of V ds .For a SET whose total capacitance is about 9 16aF,the I ds V gs oscillations can be observed at 77K.
文摘Based on the orthodox theory,a model of a single electron transistor （SET） of metallic tunneling junctions is built using the master equation method. Several parameters of the device, such as capacitance, resistance and temperature,are input into the model and thus the I-V curves are attained. These curves are consistent with those from other experiments; therefore, the model is verified. However, there still exists a difference between simulated results and experimental results,mainly comes from the stationary case of the master equation. In other words, precision of simulated results would be increased if the transient case of the master equation is considered. Moreover, the current increases exponentially at higher drain voltages, which is due to the fact that the barrier suppression is caused by the image charge potential.
