A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A tw...A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.展开更多
A hearing aid on-chip system based on accuracy optimized front- and back-end blocks is presented for enhancing the signal processing accuracy of the hearing aid. Compared with the conventional system, the accuracy opt...A hearing aid on-chip system based on accuracy optimized front- and back-end blocks is presented for enhancing the signal processing accuracy of the hearing aid. Compared with the conventional system, the accuracy optimized system is characterized by the dual feedback network and the gain compensation technique used in the front-andback-endblocks,respectively,soastoalleviatethenonlinearitydistortioncausedbytheoutputswing.By usingthetechnique,theaccuracyofthewholehearingaidsystemcanbesignificantlyimproved.Theprototypechip has been designed with a 0.13 m standard CMOS process and tested with 1 V supply voltage. The measurement results show that, for driving a 16 loudspeaker with a normalized output level of 300 mV p-p, the total harmonic distortion reached about60 dB, achieving at least three times reduction compared to the previously reported works. In addition, the typical input referred noise is only about 5 υV rms.展开更多
文摘A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.
基金Project supported by the National High Technology Research and Development Program of China(No.2008AA010701)
文摘A hearing aid on-chip system based on accuracy optimized front- and back-end blocks is presented for enhancing the signal processing accuracy of the hearing aid. Compared with the conventional system, the accuracy optimized system is characterized by the dual feedback network and the gain compensation technique used in the front-andback-endblocks,respectively,soastoalleviatethenonlinearitydistortioncausedbytheoutputswing.By usingthetechnique,theaccuracyofthewholehearingaidsystemcanbesignificantlyimproved.Theprototypechip has been designed with a 0.13 m standard CMOS process and tested with 1 V supply voltage. The measurement results show that, for driving a 16 loudspeaker with a normalized output level of 300 mV p-p, the total harmonic distortion reached about60 dB, achieving at least three times reduction compared to the previously reported works. In addition, the typical input referred noise is only about 5 υV rms.
