This work applied the ultrasonic bonding to package flip chip GaN-based light emitting diodes （flip chip LEDs） on Si substrates. The effects of ultrasonic bonding parameters on the reliability of flip chip GaN-based...This work applied the ultrasonic bonding to package flip chip GaN-based light emitting diodes （flip chip LEDs） on Si substrates. The effects of ultrasonic bonding parameters on the reliability of flip chip GaN-based LED were investigated. In the sequent aging tests, samples were driven with a constant current of 80 mA for hundreds hours at the room temperature. It was found that the electroluminescence （EL） intensity variation had a large correlation to the ultrasonic power, and then to the bonding temperature and force. A high bonding temperature and ultrasonic power and a proper bonding force improved the EL intensity significantly. It was contributed to a strong atom inter-diffusion forming a stable joint at the bonding interface, The temperature fluctuation in the aging test was the main factor to generate a high inner stress forming delamination at the interface between the chip and Au bump. As a result, delamination had retarded the photons to emit out of the LED packaging and decay its EL intensity.展开更多
Flip chip bonding has become a primary technology that has found application in the chip interconnection process in the electronic manufacturing industry in recent years. The solder joints of the flip chip bonding are...Flip chip bonding has become a primary technology that has found application in the chip interconnection process in the electronic manufacturing industry in recent years. The solder joints of the flip chip bonding are small and consist of complicated microstructures such as Sn solution, eutectic mixture, and intermetallic compounds （IMCs）, whose mechanical performance is quite different from the original solder bulk. The evolution of microstructure of the flip chip solder joints under thermal aging was analyzed. The results show that with an increase in aging time, coarsening of solder bulk matrix and AuSn4 IMCs occurred within the solder. The IMCs that are formed at the bottom side of the flip chip bond were different from those on the top side during the aging process. （Cu, Ni, Au）0Sn5 were formed at the interfaces of both sides, and large complicated （Au,Ni, Cu）Sn4 IMCs appeared for some time near the bottom interface after aging, but they disappeared again and thus （Cu,Ni, Au ）0Sn5 IMC thickness increased considerably. The influence of reflow times during the flip chip bonding （as-bonded condition） on the characteristics of interfacial IMCs was weakened when subjected to the aging process.展开更多
The driving voltage and current signals of piezoceramic transducer (PZT) were measured directly by designing circuits from ultrasonic generator and using a data acquisition software system. The input impedance and pow...The driving voltage and current signals of piezoceramic transducer (PZT) were measured directly by designing circuits from ultrasonic generator and using a data acquisition software system. The input impedance and power of PZT were investigated by using root mean square (RMS) calculation. The vibration driven by high frequency was tested by laser Doppler vibrometer (PSV-400-M2). And the thermosonic bonding features were observed by scanning electron microscope (JSM-6360LV). The results show that the input power of bonding is lower than that of no load. The input impedance of bonding is greater than that of no load. Nonlinear phase, plastic flow and expansion period, and strengthening bonding process are shown in the impedance and power curves. The ultrasonic power is in direct proportion to the vibration displacement driven by the power, and greater displacements driven by high power (>5 W) result in welding failure phenomena, such as crack, break, and peeling off in wedge bonding. For thermosonic flip chip bonding, the high power decreases position precision of bonding or results in slippage and rotation phenomena of bumps. To improve reliability and precision of thermosonic bonding, the low ultrasonic power (about 1-5 W) should be chosen.展开更多
The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that ...The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that flip chip package will soon be a mainstream technology. The silicon chip is dir ectly connected to printing circuit substrate by SnPb solder joints. Also, the u nderfill, a composite of polymer and silica particles, is filled in the gap betw een the chip and substrate around the solder joints to improve the reliabili ty of solder joints. When flip chip package specimen is tested with thermal cycl ing, the cyclic stress/strain response that exists at the underfill interfaces and solder joints may result in interfacial crack initiation and propagation. Therefore, the chip cracking and the interfacial delamination between underfill and chip corner have been investigated in many studies. Also, most researches h ave focused on the effect of fatigue and creep properties of solder joint induce d by the plastic strain alternation and accumulation. The nuderfill must have lo w viscosity in the liquid state and good adhesion to the interface after solidif ying. Also, the mechanical behavior of such epoxy material has much dependen ce on temperature in its glass transition temperature range that is usually cove red by the temperature range of thermal cycling test. Therefore, the materia l behavior of underfill exists a significant non-linearity and the assumption o f linear elastic can lack for accuracy in numerical analysis. Through numerical analysis, this study had some comparisons about the effect of linear and non -linear properties of underfill on strain behaviors around the interface of fli p chip assembly. Especially, the deformation tendency inside solder bumps could be predicted. Also, it is worthily mentioned that we have pointed out which comp onent of plastic strain, thus, either normal or shear, has dominant influence to the fatigue and creep of solder bump, which have not brought up before. About the numerical analysis to the thermal plastic strain occurs in flip chip i nterconnection during thermal cycling test, a commercial finite element software , namely, ANSYS, was employed to simulate the thermal cycling test obeyed by MIL-STD-883C. The temperatures of thermal cycling ranged from -55 ℃ to 125 ℃ with ramp rate of 36 ℃/min and a dwell time of 25 min at peak temperature. T he schematic drawing of diagonal cross-section of flip chip package composed of FR-4 substrate, silicon chip, underfill and solder bump was shown as Fig.1. Th e numerical model was two-dimensional (2-D) with plane strain assumption and o nly one half of the cross-section was modeled due to geometry symmetry. The dim ensions and boundary conditions of numerical model were shown in Fig.2. The symm etric boundary conditions were applied along the left edge of the model, and the left bottom corner was additional constrained in vertical direction to prevent body motion. The finite element meshes of overall and local numerical model was shown as Fig.3. In this study, two cases of material model were used to describe the material behavior of the underfill: the case1 was linear elastic model that assumed Young’s Modulus (E) and thermal expansion coefficient (CTE) were consta nt during thermal cycling; the case2 was MKIN model (in ANSYS) that had nonlinea r temperature-dependent stress-strain relationship and temperature-dependent CTE. The material model applied to the solder bump was ANAND model (in ANSYS) th at described time-dependent plasticity phenomenon of viscoplastic material. Bot h the FR-4 substrate and silicon chip were assumed as temperature-independent elastic material; moreover, FR-4 substrate is orthotropic while silicon chip is isotropic. From the comparison between numerical results of linear and nonlinear material a ssumption of underfill, (i.e. case1 and case2), the quantities of plastic strain around the interconnection from case1 are higher than that in case2. Thus, the linear展开更多
Flip chip die-to-wafer bonding faces challenges for industry adoption due to a variety of technical gaps or process integration factors that are not fully developed to high volume manufacturing(HVM)maturity.In this pa...Flip chip die-to-wafer bonding faces challenges for industry adoption due to a variety of technical gaps or process integration factors that are not fully developed to high volume manufacturing(HVM)maturity.In this paper,flip-chip and wire bonding are compared,then flip-chip bonding techniques are compared to examine advantages for scaling and speed.Specific recent 3-year trends in flip-chip die-to-wafer bonding are reviewed to address the key gaps and challenges to HVM adoption.Finally,some thoughts on the care needed by the packaging technology for successful HVM introduction are reviewed.展开更多
Based on flip-chip packaging,a novel approach towards integrated magnetic bio-separator was designed.The magnetic field and the force on the bead were simulated and analyzed,leading to the optimization of the fabricat...Based on flip-chip packaging,a novel approach towards integrated magnetic bio-separator was designed.The magnetic field and the force on the bead were simulated and analyzed,leading to the optimization of the fabrication parameters of the micro-magnetic unit.The planar coil as an electromagnet was fabricated through electroplating on a single seed layer. The PDMS microfluidic channel was bonded on the inverse side after Si etching.The results presented in this paper provide a novel design and fabrication to approach a microfluidic bio-separation system with magnetic beads.展开更多
This paper proposes a novel nondestructive diagnostic method for flip chips based on an improved semi-supervised deep extreme learning machine(ISDELM)and vibration signals.First,an ultrasonic transducer is used to gen...This paper proposes a novel nondestructive diagnostic method for flip chips based on an improved semi-supervised deep extreme learning machine(ISDELM)and vibration signals.First,an ultrasonic transducer is used to generate and focus ultrasounds on the surface of the flip chip to excite it,and a laser scanning vibrometer is applied to acquire the chip’s vibration signals.Then,an extreme learning machine-autoencoder(ELM-AE)structure is adopted to extract features from the original vibration signals layer by layer.Finally,the study proposes integrating the ELM with sparsity neighboring reconstruction to diagnose defects based on unlabeled and labeled data.The ISDELM algorithm is applied to experimental vibration data of flip chips and compared with several other algorithms,such as semi-supervised ELM(SS-ELM),deep ELM,stacked autoencoder,convolutional neural network,and ordinary SDELM.The results show that the proposed method is superior to the several currently available algorithms in terms of accuracy and stability.展开更多
High-power and high-reliability GaN/InGaN flip-chip light-emitting diodes （FCLEDs） have been demonstrated by employing a flip-chip design, and its fabrication process is developed. FCLED is composed of a LED die and...High-power and high-reliability GaN/InGaN flip-chip light-emitting diodes （FCLEDs） have been demonstrated by employing a flip-chip design, and its fabrication process is developed. FCLED is composed of a LED die and a submount which is integrated with circuits to protect the LED from electrostatic discharge （ESD） damage. The LED die is flip-chip soldered to the submount, and light is extracted through the transparent sapphire substrate instead of an absorbing Ni/Au contact layer as in conventional GaN/InGaN LED epitaxial designs. The optical and electrical characteristics of the FCLED are presented. According to ESD IEC61000-4-2 standard （human body model）, the FCLEDs tolerated at least 10 kV ESD shock have ten times more capacity than conventional GaN/InGaN LEDs. It is shown that the light output from the FCLEDs at forward current 350mA with a forward voltage of 3.3 V is 144.68 mW, and 236.59 mW at 1.0A of forward current. With employing an optimized contact scheme the FCLEDs can easily operate up to 1.0A without significant power degradation or failure. The li.fe test of FCLEDs is performed at forward current of 200 mA at room temperature. The degradation of the light output power is no more than 9% after 1010.75 h of life test, indicating the excellent reliability. FCLEDs can be used in practice where high power and high reliability are necessary, and allow designs with a reduced number of LEDs.展开更多
基金supported by the National Natural Science Foundation of China(Grant No.50675130)the National Key Technology Research and Development Program of the Ministry of Science and Technology of China(Grant No.2011BAE01B14)the Program for the New Century Excellent Talents in University(Grant No.NCET-07-0535)
文摘This work applied the ultrasonic bonding to package flip chip GaN-based light emitting diodes （flip chip LEDs） on Si substrates. The effects of ultrasonic bonding parameters on the reliability of flip chip GaN-based LED were investigated. In the sequent aging tests, samples were driven with a constant current of 80 mA for hundreds hours at the room temperature. It was found that the electroluminescence （EL） intensity variation had a large correlation to the ultrasonic power, and then to the bonding temperature and force. A high bonding temperature and ultrasonic power and a proper bonding force improved the EL intensity significantly. It was contributed to a strong atom inter-diffusion forming a stable joint at the bonding interface, The temperature fluctuation in the aging test was the main factor to generate a high inner stress forming delamination at the interface between the chip and Au bump. As a result, delamination had retarded the photons to emit out of the LED packaging and decay its EL intensity.
文摘Flip chip bonding has become a primary technology that has found application in the chip interconnection process in the electronic manufacturing industry in recent years. The solder joints of the flip chip bonding are small and consist of complicated microstructures such as Sn solution, eutectic mixture, and intermetallic compounds （IMCs）, whose mechanical performance is quite different from the original solder bulk. The evolution of microstructure of the flip chip solder joints under thermal aging was analyzed. The results show that with an increase in aging time, coarsening of solder bulk matrix and AuSn4 IMCs occurred within the solder. The IMCs that are formed at the bottom side of the flip chip bond were different from those on the top side during the aging process. （Cu, Ni, Au）0Sn5 were formed at the interfaces of both sides, and large complicated （Au,Ni, Cu）Sn4 IMCs appeared for some time near the bottom interface after aging, but they disappeared again and thus （Cu,Ni, Au ）0Sn5 IMC thickness increased considerably. The influence of reflow times during the flip chip bonding （as-bonded condition） on the characteristics of interfacial IMCs was weakened when subjected to the aging process.
基金Project(50675227) supported by the National Natural Science Foundation of ChinaProject(07JJ3091) supported by Natural Science Foundation of Hunan Province, China+1 种基金Project(2007001) supported by the State Key Laboratory of Digital Manufacturing Equipment and TechnologyProject(2009CB724203) supported by the Major State Basic Research Development Program of China
文摘The driving voltage and current signals of piezoceramic transducer (PZT) were measured directly by designing circuits from ultrasonic generator and using a data acquisition software system. The input impedance and power of PZT were investigated by using root mean square (RMS) calculation. The vibration driven by high frequency was tested by laser Doppler vibrometer (PSV-400-M2). And the thermosonic bonding features were observed by scanning electron microscope (JSM-6360LV). The results show that the input power of bonding is lower than that of no load. The input impedance of bonding is greater than that of no load. Nonlinear phase, plastic flow and expansion period, and strengthening bonding process are shown in the impedance and power curves. The ultrasonic power is in direct proportion to the vibration displacement driven by the power, and greater displacements driven by high power (>5 W) result in welding failure phenomena, such as crack, break, and peeling off in wedge bonding. For thermosonic flip chip bonding, the high power decreases position precision of bonding or results in slippage and rotation phenomena of bumps. To improve reliability and precision of thermosonic bonding, the low ultrasonic power (about 1-5 W) should be chosen.
文摘The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that flip chip package will soon be a mainstream technology. The silicon chip is dir ectly connected to printing circuit substrate by SnPb solder joints. Also, the u nderfill, a composite of polymer and silica particles, is filled in the gap betw een the chip and substrate around the solder joints to improve the reliabili ty of solder joints. When flip chip package specimen is tested with thermal cycl ing, the cyclic stress/strain response that exists at the underfill interfaces and solder joints may result in interfacial crack initiation and propagation. Therefore, the chip cracking and the interfacial delamination between underfill and chip corner have been investigated in many studies. Also, most researches h ave focused on the effect of fatigue and creep properties of solder joint induce d by the plastic strain alternation and accumulation. The nuderfill must have lo w viscosity in the liquid state and good adhesion to the interface after solidif ying. Also, the mechanical behavior of such epoxy material has much dependen ce on temperature in its glass transition temperature range that is usually cove red by the temperature range of thermal cycling test. Therefore, the materia l behavior of underfill exists a significant non-linearity and the assumption o f linear elastic can lack for accuracy in numerical analysis. Through numerical analysis, this study had some comparisons about the effect of linear and non -linear properties of underfill on strain behaviors around the interface of fli p chip assembly. Especially, the deformation tendency inside solder bumps could be predicted. Also, it is worthily mentioned that we have pointed out which comp onent of plastic strain, thus, either normal or shear, has dominant influence to the fatigue and creep of solder bump, which have not brought up before. About the numerical analysis to the thermal plastic strain occurs in flip chip i nterconnection during thermal cycling test, a commercial finite element software , namely, ANSYS, was employed to simulate the thermal cycling test obeyed by MIL-STD-883C. The temperatures of thermal cycling ranged from -55 ℃ to 125 ℃ with ramp rate of 36 ℃/min and a dwell time of 25 min at peak temperature. T he schematic drawing of diagonal cross-section of flip chip package composed of FR-4 substrate, silicon chip, underfill and solder bump was shown as Fig.1. Th e numerical model was two-dimensional (2-D) with plane strain assumption and o nly one half of the cross-section was modeled due to geometry symmetry. The dim ensions and boundary conditions of numerical model were shown in Fig.2. The symm etric boundary conditions were applied along the left edge of the model, and the left bottom corner was additional constrained in vertical direction to prevent body motion. The finite element meshes of overall and local numerical model was shown as Fig.3. In this study, two cases of material model were used to describe the material behavior of the underfill: the case1 was linear elastic model that assumed Young’s Modulus (E) and thermal expansion coefficient (CTE) were consta nt during thermal cycling; the case2 was MKIN model (in ANSYS) that had nonlinea r temperature-dependent stress-strain relationship and temperature-dependent CTE. The material model applied to the solder bump was ANAND model (in ANSYS) th at described time-dependent plasticity phenomenon of viscoplastic material. Bot h the FR-4 substrate and silicon chip were assumed as temperature-independent elastic material; moreover, FR-4 substrate is orthotropic while silicon chip is isotropic. From the comparison between numerical results of linear and nonlinear material a ssumption of underfill, (i.e. case1 and case2), the quantities of plastic strain around the interconnection from case1 are higher than that in case2. Thus, the linear
文摘Flip chip die-to-wafer bonding faces challenges for industry adoption due to a variety of technical gaps or process integration factors that are not fully developed to high volume manufacturing(HVM)maturity.In this paper,flip-chip and wire bonding are compared,then flip-chip bonding techniques are compared to examine advantages for scaling and speed.Specific recent 3-year trends in flip-chip die-to-wafer bonding are reviewed to address the key gaps and challenges to HVM adoption.Finally,some thoughts on the care needed by the packaging technology for successful HVM introduction are reviewed.
文摘Based on flip-chip packaging,a novel approach towards integrated magnetic bio-separator was designed.The magnetic field and the force on the bead were simulated and analyzed,leading to the optimization of the fabrication parameters of the micro-magnetic unit.The planar coil as an electromagnet was fabricated through electroplating on a single seed layer. The PDMS microfluidic channel was bonded on the inverse side after Si etching.The results presented in this paper provide a novel design and fabrication to approach a microfluidic bio-separation system with magnetic beads.
基金supported by the fellowship of China Postdoctoral Science Foundation(Grant No.2021T140279)the National Natural Science Foundation of China(Grant Nos.51705203,51775243 and 11902124)“111”Project(Grant No.B18027)。
文摘This paper proposes a novel nondestructive diagnostic method for flip chips based on an improved semi-supervised deep extreme learning machine(ISDELM)and vibration signals.First,an ultrasonic transducer is used to generate and focus ultrasounds on the surface of the flip chip to excite it,and a laser scanning vibrometer is applied to acquire the chip’s vibration signals.Then,an extreme learning machine-autoencoder(ELM-AE)structure is adopted to extract features from the original vibration signals layer by layer.Finally,the study proposes integrating the ELM with sparsity neighboring reconstruction to diagnose defects based on unlabeled and labeled data.The ISDELM algorithm is applied to experimental vibration data of flip chips and compared with several other algorithms,such as semi-supervised ELM(SS-ELM),deep ELM,stacked autoencoder,convolutional neural network,and ordinary SDELM.The results show that the proposed method is superior to the several currently available algorithms in terms of accuracy and stability.
文摘High-power and high-reliability GaN/InGaN flip-chip light-emitting diodes （FCLEDs） have been demonstrated by employing a flip-chip design, and its fabrication process is developed. FCLED is composed of a LED die and a submount which is integrated with circuits to protect the LED from electrostatic discharge （ESD） damage. The LED die is flip-chip soldered to the submount, and light is extracted through the transparent sapphire substrate instead of an absorbing Ni/Au contact layer as in conventional GaN/InGaN LED epitaxial designs. The optical and electrical characteristics of the FCLED are presented. According to ESD IEC61000-4-2 standard （human body model）, the FCLEDs tolerated at least 10 kV ESD shock have ten times more capacity than conventional GaN/InGaN LEDs. It is shown that the light output from the FCLEDs at forward current 350mA with a forward voltage of 3.3 V is 144.68 mW, and 236.59 mW at 1.0A of forward current. With employing an optimized contact scheme the FCLEDs can easily operate up to 1.0A without significant power degradation or failure. The li.fe test of FCLEDs is performed at forward current of 200 mA at room temperature. The degradation of the light output power is no more than 9% after 1010.75 h of life test, indicating the excellent reliability. FCLEDs can be used in practice where high power and high reliability are necessary, and allow designs with a reduced number of LEDs.
