期刊文献+
共找到213,280篇文章
< 1 2 250 >
每页显示 20 50 100
A low on-resistance triple RESURF SOI LDMOS with planar and trench gate integration 被引量:2
1
作者 罗小蓉 姚国亮 +7 位作者 张正元 蒋永恒 周坤 王沛 王元刚 雷天飞 张云轩 魏杰 《Chinese Physics B》 SCIE EI CAS CSCD 2012年第6期560-564,共5页
A low on-resistance (Ron,sp) integrable silicon-on-insulator (SOI) n-channel lateral double-diffused metal-oxide-semiconductor (LDMOS) is proposed and its mechanism is investigated by simulation. The LDMOS has t... A low on-resistance (Ron,sp) integrable silicon-on-insulator (SOI) n-channel lateral double-diffused metal-oxide-semiconductor (LDMOS) is proposed and its mechanism is investigated by simulation. The LDMOS has two features: the integration of a planar gate and an extended trench gate (double gates (DGs)); and a buried P-layer in the N-drift region, which forms a triple reduced surface field (RESURF) (TR) structure. The triple RESURF not only modulates the electric field distribution, but also increases N-drift doping, resulting in a reduced specific on-resistance (Ron,sp) and an improved breakdown voltage (BV) in the off-state. The DGs form dual conduction channels and, moreover, the extended trench gate widens the vertical conduction area, both of which further reduce the Ron,sp. The BV and Ron,sp are 328 V and 8.8 mΩ·cm^2, respectively, for a DG TR metal-oxide semiconductor field-effect transistor (MOSFET) by simulation. Compared with a conventional SOI LDMOS, a DG TR MOSFET with the same dimensional device parameters as those of the DG TR MOSFET reduces Ron,sp by 59% and increases BV by 6%. The extended trench gate synchronously acts as an isolation trench between the high-voltage device and low-voltage circuitry in a high-voltage integrated circuit, thereby saving the chip area and simplifying the fabrication processes. 展开更多
关键词 SOI electric field breakdown voltage trench gate specific on-resistance
原文传递
Low on-resistance 1.2 kV 4H-SiC power MOSFET with Ron, sp of 3.4 mΩ·cm^2 被引量:1
2
作者 Qiang Liu Qian Wang +4 位作者 Hao Liu Chenxi Fei Shiyan Li Runhua Huang Song Bai 《Journal of Semiconductors》 EI CAS CSCD 2020年第6期85-88,共4页
A 4H-SiC power MOSFET with specific on-resistance of 3.4 mΩ·cm^2 and breakdown voltage exceeding 1.5 kV is designed and fabricated.Numerical simulations are carried out to optimize the electric field strength in... A 4H-SiC power MOSFET with specific on-resistance of 3.4 mΩ·cm^2 and breakdown voltage exceeding 1.5 kV is designed and fabricated.Numerical simulations are carried out to optimize the electric field strength in gate oxide and at the surface of the semiconductor material in the edge termination region.Additional n-type implantation in JFET region is implemented to reduce the specific on-resistance.The typical leakage current is less than 1μA at VDS=1.4 kV.Drain–source current reaches 50 A at VDS=0.75 V and VGS=20 V corresponding to an on-resistance of 15 mΩ.The typical gate threshold voltage is 2.6 V. 展开更多
关键词 4H-SIC electric field strength floating guard ring specific on-resistance
下载PDF
An Ultra-Low Specific On-Resistance VDMOS with a Step Oxide-Bypassed Trench Structure
3
作者 段宝兴 杨银堂 +1 位作者 张波 李肇基 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第4期677-681,共5页
A novel Step Oxide-Bypassed (SOB) trench VDMOS structure is designed based on the Oxide-Bypassed concept proposed by Liang Y C. This structure is suitable for breakdown voltage below 300V to obtain ultra-low specifi... A novel Step Oxide-Bypassed (SOB) trench VDMOS structure is designed based on the Oxide-Bypassed concept proposed by Liang Y C. This structure is suitable for breakdown voltage below 300V to obtain ultra-low specific on-resistance. The main feature of this structure is the various thicknesses of sidewall oxide,which modulate electric field distribution in the drift region and the charge compensation effect. As a result, the breakdown voltage is increased no less than 20% due to the more uniform electric field of the drift region,while the specific on-resistance was reduced by 40%-60% for the step oxide bypassed compared with the oxide-bypassed structure. 展开更多
关键词 step oxide-bypassed VDMOS breakdown voltage specific on-resistance
下载PDF
基于ParFlow.CLM的居民小区屋顶雨水断接水文效应研究
4
作者 王瑶 王卫光 张翔 《中国农村水利水电》 北大核心 2024年第9期181-187,195,共8页
城市不透水面的快速扩张极大地改变了自然的水文循环过程,是造成城市内涝、河湖生态退化等城市水问题的主要原因之一。海绵城市建设及低影响开发利用源头海绵设施或城市绿地断接城市不透水面,减少不透水面的水文效应,是缓解城市水问题... 城市不透水面的快速扩张极大地改变了自然的水文循环过程,是造成城市内涝、河湖生态退化等城市水问题的主要原因之一。海绵城市建设及低影响开发利用源头海绵设施或城市绿地断接城市不透水面,减少不透水面的水文效应,是缓解城市水问题的重要措施。探究不透水面断接的水文效应对我国海绵城市建设具有重要意义。基于全分布式物理水文模型ParFlow.CLM,充分考虑城市地下构筑物,探究了不同土壤质地情景下西宁市某典型居民小区建筑屋顶断接在连续的降雨、蒸发过程中的水文效应。模拟结果显示,利用该居民小区自然绿地断接建筑屋顶能取得较好的径流控制效果:当土壤饱和导水率(K_(s))大于0.01m/h时,屋顶径流的年削减率能达到72.9%以上。屋顶断接在建筑物雨落管附近形成了集中入渗,增加了根区土壤湿度,且这一效应随着土壤渗透性的增加而增强。根区土壤湿度的增加进一步促进了绿地的蒸散发:与屋顶断接前相比,不同土壤质地情景下居民小区年蒸散发总量增加了6.2%~7.8%。另一方面,集中入渗在局部也形成了更深的湿润锋,使得更多下渗水量能够脱离植被根区的蒸散发作用,从而促进根区水分的深层渗漏。模拟结果表明,尽管该居民小区地下停车场限制了大部分区域的深层渗漏,当土壤K_(s)大于0.01m/h时,屋顶断接情景下的年深层渗漏总量仍能超过城市化前的水平。 展开更多
关键词 不透水面断接 海绵城市 低影响开发 ParFlow.CLM 城市地下构筑物
下载PDF
Ultra-low specific on-resistance high-voltage vertical double diffusion metal–oxide–semiconductor field-effect transistor with continuous electron accumulation layer 被引量:1
5
作者 马达 罗小蓉 +3 位作者 魏杰 谭桥 周坤 吴俊峰 《Chinese Physics B》 SCIE EI CAS CSCD 2016年第4期450-455,共6页
A new ultra-low specific on-resistance (Ron,sp) vertical double diffusion metal-oxide-semiconductor field-effect tran- sistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is p... A new ultra-low specific on-resistance (Ron,sp) vertical double diffusion metal-oxide-semiconductor field-effect tran- sistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the Ron,sp but also makes the Ron,sp almost independent of the n-pillar doping concentration (Am). In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the Nn, and further reduces the Ron,sp. Especially, the two PNjunctions within the trench gate support a high gate--drain voltage in the off-state and on-state, re- spectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the Ron,sp by 80% compared with the conventional super-junction VDMOS (CSJ-VDMOS) at the same high breakdown voltage (BV). 展开更多
关键词 electron accumulation layer PN junctions low specific on-resistance high breakdown voltage
原文传递
A low specific on-resistance SOI LDMOS with a novel junction field plate 被引量:3
6
作者 罗尹春 罗小蓉 +5 位作者 胡刚毅 范远航 李鹏程 魏杰 谭桥 张波 《Chinese Physics B》 SCIE EI CAS CSCD 2014年第7期686-690,共5页
A low specific on-resistance SO1 LDMOS with a novel junction field plate (JFP) is proposed and investigated theo- retically. The most significant feature of the JFP LDMOS is a PP-N junction field plate instead of a ... A low specific on-resistance SO1 LDMOS with a novel junction field plate (JFP) is proposed and investigated theo- retically. The most significant feature of the JFP LDMOS is a PP-N junction field plate instead of a metal field plate. The unique structure not only yields charge compensation between the JFP and the drift region, but also modulates the surface electric field. In addition, a trench gate extends to the buffed oxide layer (BOX) and thus widens the vertical conduction area. As a result, the breakdown voltage (BV) is improved and the specific on-resistance (Ron,sp) is decreased significantly. It is demonstrated that the BV of 306 V and the Ron,sp of 7.43 mΩ.cm2 are obtained for the JFP LDMOS. Compared with those of the conventional LDMOS with the same dimensional parameters, the BV is improved by 34.8%, and the Ron,sp is decreased by 56.6% simultaneously. The proposed JFP LDMOS exhibits significant superiority in terms of the trade-off between BV and Ron,sp. The novel JFP technique offers an alternative technique to achieve high blocking voltage and large current capacity for power devices. 展开更多
关键词 LDMOS RESURF field plate breakdown voltage specific on-resistance
原文传递
Alkyl dimethyl betaine activates the low-temperature collection capacity of sodium oleate for scheelite 被引量:2
7
作者 Xu Wang Zhengquan Zhang +5 位作者 Yanfang Cui Wei Li Congren Yang Hao Song Wenqing Qin Fen Jiao 《International Journal of Minerals,Metallurgy and Materials》 SCIE EI CSCD 2024年第1期71-80,共10页
The impact of alkyl dimethyl betaine (ADB) on the collection capacity of sodium oleate (NaOl) at low temperatures was evaluated using flotation tests at various scales. The low-temperature synergistic mechanism of ADB... The impact of alkyl dimethyl betaine (ADB) on the collection capacity of sodium oleate (NaOl) at low temperatures was evaluated using flotation tests at various scales. The low-temperature synergistic mechanism of ADB and NaOl was explored by infrared spectroscopy, X-ray photoelectron spectroscopy, surface tension measurement, foam performance test, and flotation reagent size measurement.The flotation tests revealed that the collector mixed with octadecyl dimethyl betaine (ODB) and NaOl in a mass ratio of 4:96 exhibited the highest collection capacity. The combined collector could increase the scheelite recovery by 3.48% at low temperatures of 8–12℃. This is particularly relevant in the Luanchuan area, which has the largest scheelite concentrate output in China. The results confirmed that ODB enhanced the collection capability of NaOl by improving the dispersion and foaming performance. Betaine can be introduced as an additive to NaOl to improve the recovery of scheelite at low temperatures. 展开更多
关键词 SCHEELITE BETAINE low temperature synergistic effect dispersion FOAMABILITY
下载PDF
A low on-resistance SOI LDMOS using a trench gate and a recessed drain 被引量:2
8
作者 葛锐 罗小蓉 +6 位作者 蒋永恒 周坤 王沛 王琦 王元刚 张波 李肇基 《Journal of Semiconductors》 EI CAS CSCD 2012年第7期43-46,共4页
An integrable silicon-on-insulator (SOl) power lateral MOSFET with a trench gate and a recessed drain (TGRD MOSFET) is proposed to reduce the on-resistance. Both of the trench gate extended to the buried oxide (... An integrable silicon-on-insulator (SOl) power lateral MOSFET with a trench gate and a recessed drain (TGRD MOSFET) is proposed to reduce the on-resistance. Both of the trench gate extended to the buried oxide (BOX) and the recessed drain reduce the specific on-resistance (Ron, sp) by widening the vertical conduction area and shortening the extra current path. The trench gate is extended as a field plate improves the electric field distribution. Breakdown voltage (BV) of 97 V and Ron, sp of 0.985 mf2-cm2 (l/os = 5 V) are obtained for a TGRD MOSFET with 6.5/xm half-cell pitch. Compared with the trench gate SOI MOSFET (TG MOSFET) and the conventional MOSFET, Ron' sp of the TGRD MOSFET decreases by 46% and 83% at the same BV, respectively. Compared with the SOI MOSFET with a trench gate and a trench drain (TGTD MOSFET), BV of the TGRD MOSFET increases by 37% at the same Ron,sp. 展开更多
关键词 trench gate recessed drain on-resistance breakdown voltage
原文传递
An ionic liquid-assisted strategy for enhanced anticorrosion of low-energy PEO coatings on magnesium–lithium alloy 被引量:2
9
作者 You Zhang Chuping Chen +3 位作者 Haoyue Tian Shuqi Wang Chen Wen Fei Chen 《Journal of Magnesium and Alloys》 SCIE EI CAS CSCD 2024年第6期2380-2396,共17页
A low-energy plasma electrolytic oxidation(LePEO)technique is developed to simultaneously improve energy efficiency and anti-corrosion.Ionic liquids(1-butyl-3-methylimidazole tetrafluoroborate(BmimBF_(4)))as sustainab... A low-energy plasma electrolytic oxidation(LePEO)technique is developed to simultaneously improve energy efficiency and anti-corrosion.Ionic liquids(1-butyl-3-methylimidazole tetrafluoroborate(BmimBF_(4)))as sustainable corrosion inhibitors are chosen to investigate the corrosion inhibition behavior of ionic liquid(ILs)during the LePEO process for LA91 magnesium-lithium(Mg-Li)alloy.Results show that the ionic liquid BmimBF_(4)participates in the LePEO coating formation process,causing an increment in coating thickness and surface roughness.The low conductivity of the ionic liquid is responsible for the voltage and breakdown voltage increases during the LePEO with IL process(LePEO-IL).After adding BmimBF_(4),corrosion current density decreases from 1.159×10^(−4)A·cm^(−2)to 8.143×10^(−6)A·cm^(−2).The impedance modulus increases to 1.048×10^(4)Ω·cm^(−2)and neutral salt spray remains intact for 24 h.The superior corrosion resistance of the LePEO coating assisted by ionic liquid could be mainly attributed to its compact and thick barrier layer and physical absorption of ionic liquid.The ionic liquid-assisted LePEO technique provides a promising approach to reducing energy consumption and improving film performance. 展开更多
关键词 Magnesium-lithium alloy Plasma electrolytic oxidation low energy Ionic liquid Corrosion resistance
下载PDF
Low specific on-resistance GaN-based vertical heterostructure field effect transistors with nonuniform doping superjunctions 被引量:2
10
作者 Wei Mao Hai-Yong Wang +7 位作者 Peng-Hao Shi Xiao-Fei Wang Ming Du Xue-Feng Zheng Chong Wang Xiao-Hua Ma Jin-Cheng Zhang Yue Hao 《Chinese Physics B》 SCIE EI CAS CSCD 2018年第4期426-431,共6页
A novel Ga N-based vertical heterostructure field effect transistor(HFET) with nonuniform doping superjunctions(non-SJ HFET) is proposed and studied by Silvaco-ATLAS,for minimizing the specific on-resistance(RonA... A novel Ga N-based vertical heterostructure field effect transistor(HFET) with nonuniform doping superjunctions(non-SJ HFET) is proposed and studied by Silvaco-ATLAS,for minimizing the specific on-resistance(RonA) at no expense of breakdown voltage(BV).The feature of non-SJ HFET lies in the nonuniform doping concentration from top to bottom in the n-and p-pillars,which is different from that of the conventional Ga N-based vertical HFET with uniform doping superjunctions(un-SJ HFET).A physically intrinsic mechanism for the nonuniform doping superjunction(non-SJ) to further reduce RonA at no expense of BV is investigated and revealed in detail.The design,related to the structure parameters of non-SJ,is optimized to minimize the RonA on the basis of the same BV as that of un-SJ HFET.Optimized simulation results show that the reduction in RonA depends on the doping concentrations and thickness values of the light and heavy doping parts in non-SJ.The maximum reduction of more than 51% in RonA could be achieved with a BV of 1890 V.These results could demonstrate the superiority of non-SJ HFET in minimizing RonA and provide a useful reference for further developing the Ga N-based vertical HFETs. 展开更多
关键词 GaN-based vertical HFETs nonuniform doping superjunctions minimized specific on-resistance breakdown voltage
原文传递
夏热冬冷地区Low-E玻璃节能效果研究
11
作者 杜传梅 宋鹏 徐志源 《安徽理工大学学报(自然科学版)》 CAS 2024年第4期40-49,共10页
目的为了解决夏热冬冷地区民宿玻璃幕墙节能设计过程中,对于性能接近的玻璃种类的选择问题。方法采用DeST模拟软件建立一个二层民宿的物理模型,依据《河南省公共建筑节能设计标准》选择满足要求的双玻Low-E玻璃和三玻Low-E玻璃。通过控... 目的为了解决夏热冬冷地区民宿玻璃幕墙节能设计过程中,对于性能接近的玻璃种类的选择问题。方法采用DeST模拟软件建立一个二层民宿的物理模型,依据《河南省公共建筑节能设计标准》选择满足要求的双玻Low-E玻璃和三玻Low-E玻璃。通过控制对负荷影响较大的3个参数:传热系数、太阳能总透射比、红外热能总透射比,来保持其控制参数相同或近似相等,再基于当地典型气象年的实测数据,采用DeST模拟软件对该民宿建筑进行全年能耗计算,并通过加拿大采暖季能耗评价体系(ER)与制冷季能耗评价体系(ERC)进行能耗分析,观察节能效果。结果表明将双玻用三玻进行改造后,ERC值为3.57,说明三玻两腔单Low-E中空(空气)玻璃在制冷季节能效果更好;ER值为-1.83,说明双玻单Low-E中空(氩气)玻璃在采暖季节能效果更优。三玻两腔单Low-E中空(空气)玻璃相对于双玻单Low-E中空(氩气)玻璃成本贵了60元/m^(2),每年带来的经济效益为1.92元/m^(2),需要至少30年才能完成成本回收,综合考虑各种因素,双玻单Low-E中空玻璃才是首选。结论研究结果为夏热冬冷地区民宿建筑玻璃幕墙种类的选择提供了一种新的方法,具有重要的参考价值和借鉴意义。 展开更多
关键词 夏热冬冷地区 low-E玻璃 玻璃幕墙
下载PDF
Design of 700 V triple RESURF nLDMOS with low on-resistance 被引量:1
12
作者 银杉 乔明 +1 位作者 张永满 张波 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第11期47-50,共4页
A 700 V triple RESURF nLDMOS with a low specific on-resistance of 100 mΩ.cm^2 is designed. Compared with a conventional double RESURF nLDMOS whose P-type layer is located on the surface of the drift region, the P-typ... A 700 V triple RESURF nLDMOS with a low specific on-resistance of 100 mΩ.cm^2 is designed. Compared with a conventional double RESURF nLDMOS whose P-type layer is located on the surface of the drift region, the P-type layer of a triple RESURF nLDMOS is located within it. The difference between the locations of the P-type layer means that a triple RESURF nLDMOS has about a 30% lower specific on-resistance at the same given breakdown voltage of 700 V. Detailed research of the influences of various parameters on breakdown voltage, specific on-resistance, as well as process tolerance is involved. The results may provide guiding principles for the design of triple RESURF nLDMOS. 展开更多
关键词 NLDMOS triple RESURF breakdown voltage specific on-resistance charge sharing
原文传递
Ultra-low specific on-resistance vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench 被引量:1
13
作者 王沛 罗小蓉 +11 位作者 蒋永恒 王琦 周坤 吴丽娟 王骁玮 蔡金勇 罗尹春 范叶 胡夏融 范远航 魏杰 张波 《Chinese Physics B》 SCIE EI CAS CSCD 2013年第2期439-444,共6页
An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench(HK TG VDMOS) is proposed in this paper.The HK TG VDMOS features a hi... An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench(HK TG VDMOS) is proposed in this paper.The HK TG VDMOS features a high-k(HK) trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage(BV).Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction(SJ) vertical double-diffused metal-oxide semiconductor(VDMOS),the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS(TG VDMOS) and conventional superjunction trench gate VDMOS(SJ TG CDMOS). 展开更多
关键词 high permittivity specific on-resistance breakdown voltage trench gate
原文传递
Revealing the key role of non-solvating diluents for fast-charging and low temperature Li-ion batteries 被引量:1
14
作者 Yuping Zhang Siyin Li +8 位作者 Junkai Shi Jiawei Lai Ziyue Zhuang Jingwen Liu Wenming Yang Liang Ma Yue-Peng Cai Jijian Xu Qifeng Zheng 《Journal of Energy Chemistry》 SCIE EI CAS CSCD 2024年第7期171-180,共10页
Fast-charging and low temperature operation are of vital importance for the further development of lithium-ion batteries(LIBs),which is hindered by the utilization of conventional carbonate-based electrolytes due to t... Fast-charging and low temperature operation are of vital importance for the further development of lithium-ion batteries(LIBs),which is hindered by the utilization of conventional carbonate-based electrolytes due to their slow kinetics,narrow operating temperature and voltage range.Herein,an acetonitrile(AN)-based localized high-concentration electrolyte(LHCE)is proposed to retain liquid state and high ionic conductivity at ultra-low temperatures while possessing high oxidation stability.We originally reveal the excellent thermal shielding effect of non-solvating diluent to prevent the aggregation of Li^(+) solvates as temperature drops,maintaining the merits of fast Li transport and facile desolvation as at room temperature,which bestows the graphite electrode with remarkable low temperature performance(264 mA h g^(-1) at-20 C).Remarkably,an extremely high capacity retention of 97%is achieved for high-voltage high-energy graphite||NCM batteries after 250 cycles at-20 C,and a high capacity of 110 mA h g^(-1)(71%of its room-temperature capacity)is retained at-30°C.The study unveils the key role of the non-solvating diluents and provides instructive guidance in designing electrolytes towards fast-charging and low temperature LIBs. 展开更多
关键词 Li-ion battery Fast-charging low temperature Non-solvating diluent Shielding effect
下载PDF
Electrolyte Design for Low‑Temperature Li‑Metal Batteries:Challenges and Prospects 被引量:1
15
作者 Siyu Sun Kehan Wang +3 位作者 Zhanglian Hong Mingjia Zhi Kai Zhang Jijian Xu 《Nano-Micro Letters》 SCIE EI CAS CSCD 2024年第2期365-382,共18页
Electrolyte design holds the greatest opportunity for the development of batteries that are capable of sub-zero temperature operation.To get the most energy storage out of the battery at low temperatures,improvements ... Electrolyte design holds the greatest opportunity for the development of batteries that are capable of sub-zero temperature operation.To get the most energy storage out of the battery at low temperatures,improvements in electrolyte chemistry need to be coupled with optimized electrode materials and tailored electrolyte/electrode interphases.Herein,this review critically outlines electrolytes’limiting factors,including reduced ionic conductivity,large de-solvation energy,sluggish charge transfer,and slow Li-ion transportation across the electrolyte/electrode interphases,which affect the low-temperature performance of Li-metal batteries.Detailed theoretical derivations that explain the explicit influence of temperature on battery performance are presented to deepen understanding.Emerging improvement strategies from the aspects of electrolyte design and electrolyte/electrode interphase engineering are summarized and rigorously compared.Perspectives on future research are proposed to guide the ongoing exploration for better low-temperature Li-metal batteries. 展开更多
关键词 Solid electrolyte interphase Li metal low temperature Electrolyte design BATTERIES
下载PDF
Study on the low mechanical anisotropy of extruded Mg-Zn-Mn-Ce-Ca alloy tube in the compression process 被引量:1
16
作者 Dandan Li Qichi Le +6 位作者 Xiong Zhou Xiaoqiang Li Chenglu Hu Ruizhen Guo Tong Wang Ping Wang Wenxin Hu 《Journal of Magnesium and Alloys》 SCIE EI CAS CSCD 2024年第3期1054-1067,共14页
In this study,the extruded Mg-Zn-Mn-Ce-Ca alloy tube with a low compression anisotropy along the ED,45ED and TD was prepared.The effect of the second phases,initial texture and deformation behavior on this low mechani... In this study,the extruded Mg-Zn-Mn-Ce-Ca alloy tube with a low compression anisotropy along the ED,45ED and TD was prepared.The effect of the second phases,initial texture and deformation behavior on this low mechanical anisotropy was investigated.The results revealed that the alloy tube contains the high content(Mg1-xZnx)11Ce phase and the low content of Mg12Ce phase.These second phases are respectively incoherent and coherent with the Mg matrix,and their influence can be ignored.Additionally,the alloy tube exhibited a weak basal fiber texture,where the c-axis was aligned along the 0°∼30°tilt from TD to ED.Such a texture made the initial deformation(at 1.0%∼1.6%strain)of the three samples controlled by comparable basalslip.As deformation progressed(1.6∼9.0%strain),larger amounts of ETWs nucleated and gradually approached saturation in the three samples,re-orienting the c-axis to a 0°∼±30°deviation with respect to the loading directions.Meanwhile,the prismatic and pyramidal<c+a>slips replaced the dominant deformation progressively until fracture.Eventually,the similar deformation mechanisms determined by the weak initial texture in the three samples contribute to the comparable strain hardening rates,resulting in the low compressive anisotropy of the alloy tube. 展开更多
关键词 Mg alloy tube low mechanical anisotropy Weak texture Deformation mechanism.
下载PDF
Dual-gate lateral double-diffused metal—oxide semiconductor with ultra-low specific on-resistance 被引量:1
17
作者 范杰 汪志刚 +1 位作者 张波 罗小蓉 《Chinese Physics B》 SCIE EI CAS CSCD 2013年第4期531-536,共6页
A new high voltage trench lateral double-diffused metal–oxide semiconductor (LDMOS) with ultra-low specific onresistance (R on,sp ) is proposed. The structure features a dual gate (DG LDMOS): a planar gate and... A new high voltage trench lateral double-diffused metal–oxide semiconductor (LDMOS) with ultra-low specific onresistance (R on,sp ) is proposed. The structure features a dual gate (DG LDMOS): a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage (BV). Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate. 展开更多
关键词 breakdown voltage specific on-resistance dual gate oxide trench
原文传递
An NMOS output-capacitorless low-dropout regulator with dynamic-strength event-driven charge pump 被引量:1
18
作者 Yiling Xie Baochuang Wang +1 位作者 Dihu Chen Jianping Guo 《Journal of Semiconductors》 EI CAS CSCD 2024年第6期23-34,共12页
In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loo... In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loop with the dynamic strength control(DSC),is proposed in this paper,which overcomes trade-offs inherent in conventional structures.The presented design addresses and resolves the large signal stability issue,which has been previously overlooked in the event-driven charge pump structure.This breakthrough allows for the full exploitation of the charge-pump structure's poten-tial,particularly in enhancing transient recovery.Moreover,a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage,leading to favorable static characteristics.A prototype chip has been fabricated in 65 nm CMOS technology.The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current(IQ)and can recover within 30 ns under 200 mA/10 ns loading change. 展开更多
关键词 output-capacitorless low-dropout regulator fast transient low quiescent current event-driven charge pump
下载PDF
Origin of the presence/absence variation of the LTIA1/LTIA2 mini-ribonucleaseⅢgenes required for low-temperature growth in rice 被引量:1
19
作者 Jing Yang Yu Peng +5 位作者 Limin Mi Aiqing Sun Ping Li Yan Wang Yi Zhang Sheng Teng 《The Crop Journal》 SCIE CSCD 2024年第5期1459-1470,共12页
A rice low temperature-induced albino variant was determined by the recessive ltia1 and ltia2 genes.LTIA1 and LTIA2 encode highly conserved mini-ribonucleasesⅢlocated in chloroplasts and expressed in aerial parts of ... A rice low temperature-induced albino variant was determined by the recessive ltia1 and ltia2 genes.LTIA1 and LTIA2 encode highly conserved mini-ribonucleasesⅢlocated in chloroplasts and expressed in aerial parts of the plant.At low temperature,LTIA1 and LTIA2 redundantly affect chlorophyll levels,non-photochemical quenching,photosynthetic quantum yield of PSⅡand seedling growth.LTIA1 and LTIA2 proteins are involved in splicing of atp F and the biogenesis of 16S and 23S rRNA in chloroplasts.Presence/absence variation of LTIA1,the ancestral copy,was found only in japonica but that of LTIA2 in all rice subgroups.Accessions with LTIA2 presence tended to be distributed more remote from the equator compared to those with LTIA2 absence.LTIA2 duplicated from LTIA1 at the early stage of divergence of the AA genome Oryza species but deleted againin O.nivara.In cultivated rice,absence of LTIA2 is derived from O.nivara.LTIA1 absence occurred more recently in japonica. 展开更多
关键词 RICE low temperature induced albino Mini-RNaseⅢ Presence/Absence variations Evolution
下载PDF
Synergistic anionic/zwitterionic mixed surfactant system with high emulsification efficiency for enhanced oil recovery in low permeability reservoirs 被引量:1
20
作者 Hai-Rong Wu Rong Tan +6 位作者 Shi-Ping Hong Qiong Zhou Bang-Yu Liu Jia-Wei Chang Tian-Fang Luan Ning Kang Ji-Rui Hou 《Petroleum Science》 SCIE EI CAS CSCD 2024年第2期936-950,共15页
Emulsification is one of the important mechanisms of surfactant flooding. To improve oil recovery for low permeability reservoirs, a highly efficient emulsification oil flooding system consisting of anionic surfactant... Emulsification is one of the important mechanisms of surfactant flooding. To improve oil recovery for low permeability reservoirs, a highly efficient emulsification oil flooding system consisting of anionic surfactant sodium alkyl glucosyl hydroxypropyl sulfonate(APGSHS) and zwitterionic surfactant octadecyl betaine(BS-18) is proposed. The performance of APGSHS/BS-18 mixed surfactant system was evaluated in terms of interfacial tension, emulsification capability, emulsion size and distribution, wettability alteration, temperature-resistance and salt-resistance. The emulsification speed was used to evaluate the emulsification ability of surfactant systems, and the results show that mixed surfactant systems can completely emulsify the crude oil into emulsions droplets even under low energy conditions. Meanwhile,the system exhibits good temperature and salt resistance. Finally, the best oil recovery of 25.45% is achieved for low permeability core by the mixed surfactant system with a total concentration of 0.3 wt%while the molar ratio of APGSHS:BS-18 is 4:6. The current study indicates that the anionic/zwitterionic mixed surfactant system can improve the oil flooding efficiency and is potential candidate for application in low permeability reservoirs. 展开更多
关键词 Anionic/zwitterionic mixed surfactant system EMULSIFICATION Synergistic effect low permeability reservoir Enhanced oil recovery
下载PDF
上一页 1 2 250 下一页 到第
使用帮助 返回顶部