The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However...The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.展开更多
The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However...The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.展开更多
基金This work was supported by the National Natural Science Foundation of China(61925402,61851402 and 61734003)Science and Technology Commission of Shanghai Municipality(19JC1416600)+2 种基金National Key Research and Development Program(2017YFB0405600)Shanghai Education Development Foundation and Shanghai Municipal Education Commission Shuguang Program(18SG01)China Postdoctoral Science Foundation(2019M661358,2019TQ0065).
文摘The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.
文摘The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.
